Correlated double-sampling integral circuit

Abstract

The embodiment of the invention provides a correlated double-sampling integral circuit, which comprises a sampling holding module, an energy storage unit and a feedback module. The sampling holding module is used for sampling and holding different input signals. The energy storage unit is used for charges corresponding to the input signals that have been sampled and held to generate node signals. The feedback module is used for generating a negative feedback loop with the energy storage unit, thus controlling a situation to make the node signals in an integral stage and the node signals in a reset stage keep consistent to prevent output jump of the correlated double-sampling integral circuit. Therefore, the correlated double-sampling integral circuit eliminates operational amplifier 1 / f noise and noise caused by mismatching voltage and the like, and prevents or weakens output jump of the correlated double-sampling integral circuit caused by increases of the integral frequency.

Description

Technical field [0001] The embodiments of the present invention relate to the technical field of circuits, and in particular to a correlated double sampling integration circuit. Background technique [0002] In order to reduce the impact of op amp 1 / f noise and mismatch voltage in the integrator circuit, correlated double sampling technology is usually introduced, specifically by sampling different input signals twice before and after, the input signal after the two samples is Analog subtraction to eliminate noise caused by op amp 1 / f noise and mismatch voltage, so as to obtain a true signal level. [0003] An exemplary correlated double sampling integration circuit includes a sampling circuit, an energy storage capacitor, and an amplifier. The sampling circuit performs time-division sampling under the control of two-phase non-overlapping clocks Φ1 and Φ2. When the clock Φ1 is high and the clock Φ2 is low, the positive plate of the energy storage capacitor Ci samples the input sig...

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Problems solved by technology

[0004] However, in the above exemplary correlated double-sampling integration circuit, when the clock Φ1 changes from low to high, the output of the amplifier will jump from the output value of the clock Φ2 to the common-mode voltage Vcm when the clock Φ2 is high; At the high moment, the output of the amplifier will jump from the common-mode voltage Vcm to the sum of the output value and the integral value of the original clock Φ2 stage, which will cause the output jump of the relevant double-sampling integration circuit to increase with the increase of the integration times. bigger

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