Multi-branch jump co-processing method and device

Abstract

The present application provides a multi-branch jump co-processing method and device, including: the first network processor obtains the branch jump condition, and sends the branch jump condition to the coprocessor, the branch jump condition includes N branch jump conditions The sub-conditions, the branch jump sub-conditions are in one-to-one correspondence with the sub-TCAMs; the coprocessor matches the branch jump sub-conditions corresponding to each sub-TCAM with the TCAM entries in each sub-TCAM, and determines at least one TCAM entry that matches successfully; and Determine the SRAM address according to the successfully matched TCAM entry, and the SRAM unit corresponding to the SRAM address is used to store the storage address corresponding to the action to be executed; send the SRAM address to the second network processor; the second network processor determines the action to be executed according to the SRAM address The corresponding storage address executes the action to be executed corresponding to the storage address. Therefore, the matching efficiency of the branch jump condition is improved, and the power consumption of the TCAM is reduced.

Description

technical field [0001] The present application relates to multi-branch jump co-processing technology, in particular to a multi-branch jump co-processing method and device. Background technique [0002] With the continuous development of Internet technology, the application of switches or routers is becoming more and more frequent. Generally, switches or routers include network processors, and the software running on the network processors will encounter multi-branch jump structures. [0003] Currently, the network processor implements such branch jump based on a Ternary Content Address Memory (TCAM for short). There are multiple TCAM entries stored in the TCAM. The network processor matches the compiled branch jump condition with the TCAM entry in the TCAM, and when the match is successful, the network processor will match the static random access memory (SRAM for short) corresponding to the successful TCAM entry The address is sent to the next network processor, and the n...

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Problems solved by technology

[0004] However, when the current network processor performs branch jump condition matching based on TCAM, there is a problem of a large number of matches

Especially when the branch jump conditions are more complex, the TCAM entries will also have an explosive growth trend, which will cause the problem of low matching efficiency of multi-branch jump conditions, and this will bring further challenges to the storage space of TCAM

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