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An Adaptive Method for Incremental Step Pulse Programming of Flash Memory

A flash memory, memory cell technology, applied in static memory, read-only memory, digital memory information, etc., can solve problems such as slow programming, low programming efficiency, and long overall programming performance

Active Publication Date: 2020-11-06
SK HYNIX INC
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  • Abstract
  • Description
  • Claims
  • Application Information

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Problems solved by technology

However, lower V start value results in slower than necessary programming during the BOL to MOL cycle, thus resulting in excessively long overall programming performance
This programming inefficiency is even more pronounced in flash technologies with greater than four layers such as TLC (8 layers) and QLC (16 layers)

Method used

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  • An Adaptive Method for Incremental Step Pulse Programming of Flash Memory
  • An Adaptive Method for Incremental Step Pulse Programming of Flash Memory
  • An Adaptive Method for Incremental Step Pulse Programming of Flash Memory

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Embodiment Construction

[0029] In the present disclosure, an adaptive programming method for programming flash memory that significantly reduces the total programming time with minimal overhead is described. Figure 4 Is a flowchart 400 illustrating an adaptive programming technique according to some embodiments. At step 402, flash memory programming is initiated. First, the test programming voltage is used to detect the cell programming speed (step 404). Then, adjust the start programming voltage V based on the detected cell programming speed start (Step 406). Then, use V start ISPP is performed on the adjusted value of (step 408). This technology makes V start Changes are made at different stages of the life of the flash memory to cause changes in the programming characteristics of the memory cells. For example, when programming is faster than the end of life (EOL) of the memory device, in the beginning of life (SOL) of the memory device, the adaptive technology results in a higher V start Value, ...

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Abstract

According to an adaptive programming method for flash memory, cell programming speed is tested by programming a plurality of cells using a fixed test programming voltage. Then, the start programming voltage V is adjusted based on the detected cell programming speed start . Then, using V start adjustment value to perform ISPP.

Description

[0001] Cross references to related applications [0002] This application requires the application number 62 / 248,940 filed on October 30, 2015, titled "ADAPTIVE SCHEME FOR INCREMENTAL STEP PULSE PROGRAMMING OF NAND MEMORY" The rights of the U.S. Provisional Application, which is incorporated herein by reference. Background technique [0003] With continuous flash memory scaling, especially NAND flash memory technology scaling, a fixed starting programming voltage (V) is routinely used throughout the life cycle of NAND flash memory. start ) Lead to inefficient programming. Incremental step pulse programming (ISPP) is a way to achieve V th Common NAND programming method that balances between distribution and programming time (tPROG). Figure 1 shows the ISPP scheme, and Figure 2 shows the four threshold voltage distributions for a 2-bit flash memory per cell, where L 0 Indicates erasing state, L 1 , L 2 And L 3 Represents 3 programming states. ISPP applies a relatively low start pr...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): G11C16/34
CPCG11C16/3495G11C11/5628G11C16/3459G11C29/021G11C29/028
Inventor 李濬张延
Owner SK HYNIX INC
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