Cache memory access method and apparatus

Abstract

The invention provides a cache memory access method and apparatus. The cache memory access method comprises the steps of determining a to-be-compressed cache block as a first block in region (FBR) in a cache region or a successive block in region (SBR) in the cache region according to an address of the to-be-compressed cache block and a first preset threshold, wherein the cache region is located in a cache memory and comprises a quantity of cache blocks with continuous addresses, and the quantity is equal to the first preset threshold; and if the to-be-compressed cache block is determined as the SBR and the cache memory is determined to hit the FBR, performing dictionary-based data compression on the SBR according to FBR dictionary items stored in the FBR to generate compressed SBR data. According to the cache memory access method provided by the invention, the whole cache region is subjected to the data compression by a compression delay of the single cache block, so that the Cache compression rate is increased.

Description

technical field [0001] The invention relates to the technical field of computers, in particular to a method and device for accessing a cache memory. Background technique [0002] Cache Memory (Cache for short) is a memory between the Central Processing Unit (Central Processing Unit, CPU for short) and the memory. When the CPU accesses the memory, it first judges whether the content to be accessed is in the Cache. If so, It is called a "hit", and the CPU can directly call the content to be accessed from the Cache, otherwise, it is called a "miss", and the CPU can only call the content to be accessed in the memory, because the access speed of the Cache is faster than that of the memory Several times or even ten times, therefore, for the content to be accessed by the CPU, it is usually copied from the memory to the Cache in advance. However, the storage capacity of the Cache is relatively small, so the data stored in the Cache is usually data compressed using a Cache compressi...

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Problems solved by technology

[0004] However, if the overall dictionary-based compression is performed with a larger cache line unit, the delay and power consumption of Cache compression will be increased, and the access speed of Cache will be reduced. Therefore, in order to ensure the delay of Cache access, only The basic unit of data compression is the cache line, so that the compression rate of the Cache is low

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