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Method for processing semiconductor wafers and protective cover for covering semiconductor wafers

A technology of semiconductors and covers, which is applied in the direction of semiconductor devices, semiconductor/solid-state device manufacturing, and work carriers, and can solve problems such as difficult processing

Active Publication Date: 2021-05-14
INFINEON TECH AG
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

In particular, the non-planar rear side of the stack makes further processing difficult and requires additional cutouts, for example when wafer clamps are applied

Method used

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  • Method for processing semiconductor wafers and protective cover for covering semiconductor wafers
  • Method for processing semiconductor wafers and protective cover for covering semiconductor wafers
  • Method for processing semiconductor wafers and protective cover for covering semiconductor wafers

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Embodiment Construction

[0141] In the following detailed description, reference is made to the accompanying drawings which form a part hereof and in which are shown for illustration specific embodiments in which the present invention can be practiced. invention. In this regard, directional terms such as "above", "below", "forward", "rear", "front", "rear", etc. are used with reference to the orientation of the figure(s) being described. Because components of the embodiments can be positioned in a variety of different orientations, directional terms are used for illustration and are not limiting in any way. It is to be understood that other embodiments can be utilized and structural or logical changes can be made without departing from the scope of the present invention. It goes without saying that features of the different exemplary embodiments described here can be combined with one another unless otherwise specified. Therefore, the following detailed description should not be interpreted in a res...

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Abstract

According to various embodiments, the method can include: processing a semiconductor wafer (102, 202), the semiconductor wafer having a first main process side (102t) and a second main process side (102b), the second main process side and The first main process sides (102t) are opposite; wherein the semiconductor wafer (102, 202) has at least one circuit area (102s) on the first main process side (102t), said circuit area having at least one electronic circuit. According to various embodiments, the method for processing a semiconductor wafer (102, 202) can comprise: forming a reinforcing structure (106) at least partially surrounding at least one circuit region (102s), said reinforcing structure strengthening the semiconductor wafer (102, 202), wherein the reinforcement structure (106) has a cutout (106a) at least on a part of at least one circuit region (102s); thinning the semiconductor with the reinforcement structure (106) from the second main process side (102b) Wafer (102, 202).

Description

technical field [0001] The present invention relates to a method for processing a semiconductor wafer or semiconductor wafers and a protective cover for covering the semiconductor wafers. Background technique [0002] Generally, in semiconductor technology, semiconductor chips (also referred to as integrated circuits, ICs, chips or microchips) can be processed, divided and embedded in and / or on wafers (or substrates or carriers). Manufactured chips (eg embedded integrated circuits) can be mounted in or on a carrier and contacted in order to provide specific functions, such as switching current. In order to reduce the resistive losses of the chip, which reduces its power consumption especially at high currents, the chip as a whole can be made as thin as possible so that the vertical current paths through the chip are as short as possible. In order to manufacture such chips, correspondingly thin wafers are required, eg for the manufacture of metal oxide semiconductor field ef...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): H01L21/30H01L21/77H01L27/04H01L21/82
CPCH01L2221/68381H01L2221/6834H01L21/6835H01L2221/68327H01L21/6836B24B37/32H01L21/67383H01L21/30625
Inventor 弗朗西斯科·哈维尔·桑托斯罗德里格斯罗兰德·鲁普
Owner INFINEON TECH AG