Design method of multi-rate interface for real-time simulator of active distribution network based on fpga
A technology of real-time simulation and simulation interface, applied in the direction of instruments, electrical digital data processing, etc., can solve problems such as difficulty in ensuring real-time simulation, different solution times, and time redundancy.
Active Publication Date: 2021-02-02
TIANJIN UNIV
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Problems solved by technology
Considering that the divided subsystems may have different time-scale dynamic characteristics, if the whole system adopts the same simulation step size, the selection of the step size will be limited by the time constant of the fast subsystem, and it is difficult to guarantee the real-time performance of the simulation
On the other hand, the solving scale and difficulty of solving each subsystem are different, and the actual solving time is often different. If a uniform simulation step size is set, each FPGA will wait for each other until all FPGAs complete the solving task, resulting in time consuming more, increase the simulation time
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[0067] In the embodiment of the present invention, the multi-FPGA-based real-time simulator uses four Stratix V series FPGA5SGSMD5K2F40C2N of Altera Corporation and its supporting official development boards to complete the real-time simulation of the active distribution network containing the photovoltaic power generation system. Simulation platform such as Figure 4 As shown, FPGA1 communicates with the other three FPGAs at the same time, and there is no data interaction among FPGA2, FPGA3, and FPGA4. Each development board uses optical fiber to realize communication. The entire real-time emulator is driven by a 125MHz clock, and the single-channel data transmission rate between FPGAs is 2500Mbps.
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FPGA-based multi-rate interface design method for active distribution network real-time simulator, including: 1) Download the information of each subsystem to the corresponding FPGA, subsystem m is connected to subsystem n, and the simulation step size of subsystem m is Integer multiple of the simulation step size of system n; 2) Set the simulation time t=0 to start the simulation; 3) Advance the simulation time by one step, t=t+Δt; 4) Each subsystem completes the simulation calculation and interacts with the simulation interface data; 5) subsystem m sends the received simulation interface data into the averaging unit, and subsystem n sends the received simulation interface data into the interpolation unit; 6) judges whether the physical time reaches t, if it reaches 7), then enters 7), Otherwise, after the real-time emulator waits until t, enter 7); 7) judge whether the simulation time t reaches the end of the simulation, if it reaches the end of the simulation, otherwise return to 3). The multi-rate interface design method of the invention effectively improves the simulation speed of the multi-FPGA-based active distribution network real-time simulator.
Description
technical field [0001] The invention relates to a real-time emulator multi-rate interface. In particular, it relates to a multi-rate interface design method for an active distribution network real-time simulator based on FPGA. Background technique [0002] With the massive access of distributed power sources, energy storage devices, micro-grids and other distribution-side resources, the organizational form and operating characteristics of active distribution networks have undergone profound and lasting changes. These changes in the active distribution network make it more different and challenging than the traditional distribution system in terms of planning and design, operation optimization, protection control, and simulation analysis. At the level of simulation calculation, various distributed power sources, energy storage, power electronic devices and other new equipment widely connected in the active power distribution system make its own dynamic characteristics more c...
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IPC IPC(8): G06F13/10
CPCG06F13/107
Inventor 李鹏王智颖王成山富晓鹏
Owner TIANJIN UNIV




