5results about How to "Take up less resources" patented technology

The application discloses a method for instruction branch prefetching in an AIGPU processor, which comprises the following steps: 1) defining a branch prefetching instruction in a GPU instruction set, the branch prefetching instruction is used to check whether the instruction at label exists in the cache, if the instruction at label does not exist in the cache, one or more instruction data at label are fetched from the lower storage to the cache; 2) according to the PC absolute value or relative value coded by the branch prefetching instruction, the data at the program branch instruction address is prefetched. The application provides a mechanism for branch prefetching through an instruction, which can reduce the performance loss during branch jumping and improve the system performance. The application does not use a complex branch prediction circuit, and the prediction delay and prediction error are avoided.

The application relates to a method for constructing a data synchronization engine and data query synchronization, a method for constructing a data synchronization engine, which comprises the following steps: step one: configuring three annotations, the annotations comprising: @EnableIaaSDataEngine, @DataInterceptor and @DataBoxHandler; step two: configuring an intercepting processing class interface, which comprises: defining an intercepting processing class interface DataBox, defining processing logic after successful interception, and defining AbstractDataBox; step three: defining an interceptor, parameter management and registering the interceptor; and a method for data query synchronization, which comprises: using the data synchronization engine to query synchronization data. The application solves the problems of data inconsistency and disordered and inharmonious front-end interface display logic caused by switching different underlying IaaS resources under the same management interface.

The application discloses a kind of main control board for picosecond laser treatment system, including STM32 single-chip microcomputer and RS232 serial communication touch screen control circuit module, RS232 serial communication laser output control and state monitoring circuit module, opto-coupler isolated IO input circuit module, opto-coupler isolated IO output circuit module, analog voltage input circuit module, TFT card and USB data storage module, DAC circuit module, galvanometer control circuit module and network communication circuit module, the STM32 mainboard is driven by above-mentioned each functional circuit module to the peripheral equipment of corresponding electric control system.The application also discloses 755nm picosecond laser treatment electric control system.The application has big data function and network communication function, has AI auxiliary operation, internet of things system, teaching video function.Greatly improve the treatment effect, safety, reliability, effectiveness of product, reduce product cost, use difficulty, failure rate, maintenance rate and maintenance cost.

The application provides a digital filtering system for multi-domain analysis of a vector network analyzer, and the specific process of the digital filtering system for processing signals is as follows: multiple analog intermediate frequency input signals enter an analog-digital conversion control and holding unit through a signal conditioning circuit, so as to convert the multiple analog intermediate frequency signals into multiple digital intermediate frequency signals; the multiple digital intermediate frequency signals enter a multi-channel data synchronization unit; under a non-modulation measurement domain, the signals enter a continuous filtering unit, under a synchronous modulation domain, the signals enter a synchronous modulation filtering unit, and when in a data storage mode, a spectrum mode or other special modes, the signals enter an ADC data storage unit; a filtering coefficient generation and control unit generates different FIR filtering coefficients according to input data modes, and sends the filtering coefficients into a multi-channel parallel FIR filtering unit. The technical scheme of the application overcomes the problem that the filtering system in the prior art cannot meet the digital filtering requirements of the vector network analyzer under different measurement modes.

This invention provides a multi-power integrated electrical interlocking device, relating to the field of low-voltage electrical technology. It includes: multiple signal conversion modules and an interlocking connection module. The interlocking connection module includes multiple interlocking connection units corresponding to each signal conversion module. Each interlocking connection unit includes an interlocking wiring network. Each signal conversion module includes one input terminal and multiple output terminals. The input terminal is connected to the status node of a circuit breaker in the multi-power system, and the multiple output terminals are connected to the corresponding interlocking connection unit. Each signal conversion module converts the input signal of the target circuit breaker's status node into multiple sets of dry contact signals. The interlocking wiring network is connected based on the interlocking logic of the corresponding target circuit breaker. The interlocking connection unit performs interlocking control on the corresponding target circuit breaker through the interlocking wiring network and the multiple sets of dry contact signals. This invention achieves forced interlocking between multiple power sources through hardware-level interlocking design without the need for external interlocking lines.