Reconfigurable CNN (Convolutional Neural Network) high concurrency convolution accelerator

An accelerator and convolution technology, applied in the direction of neural architecture, biological neural network model, etc., can solve the problems of complex configuration, low efficiency, high power consumption, reduce the occupied resources, simplify the control part, and improve the utilization rate.

Active Publication Date: 2018-11-13
NANJING UNIV
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AI Technical Summary

Problems solved by technology

[0004] At present, the acceleration of neural networks is highly dependent on Nvidia's GPU accelerator card, and its shortcomings of high power consumption and low efficiency limit its application scenarios
For some dedicated neural network accelerators, the utilization rate of convolution computing resources is not high, and the configuration is complicated

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  • Reconfigurable CNN (Convolutional Neural Network) high concurrency convolution accelerator
  • Reconfigurable CNN (Convolutional Neural Network) high concurrency convolution accelerator

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Embodiment Construction

[0031] The present invention will be described in detail below in conjunction with the accompanying drawings and specific implementation cases.

[0032] Such as figure 1 , the reconfigurable convolution accelerator is mainly composed of a main controller, a feature map address generation unit, a weight address generation unit, a reconfigurable computing unit, a result address generation unit and a storage exchange unit. The main controller is responsible for receiving operation configuration information, including feature map size, number of feature map channels, convolution kernel size, convolution kernel channel number, output result size, output result channel number, convolution stride and convolution mode, receiving start signal to start each sub-module, internally calculate the index value of each convolution operation cycle according to the configuration information, according to the index value and convolution mode, the feature map address generation unit and the weigh...

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Abstract

The invention provides a reconfigurable CNN (Convolutional Neural Network) high concurrency convolution accelerator, which comprises a weight address generation unit, a result address generation unit,a reconfigurable calculation unit, a characteristic pattern address generation unit, a master controller and a memory exchange unit, wherein the weight address generation unit generates the address of convolution kernel data in a cache; the result address generation unit generates the address of result data in the cache; the reconfigurable calculation unit can reconfigure a calculation array intotwo multiply-accumulation tree circuits with different particle sizes; the characteristic pattern address generation unit generates the address of characteristic pattern data in the cache; the mastercontroller generates an accumulator resetting signal synchronous with the address, carries out gating on a corresponding circuit in the reconfigurable calculation unit, and generates an interrupt signal for the end of the whole operation; and the memory exchange unit converts an effective characteristic pattern read address and a weight read address into the read operation of a memory unit, and converts an effective result write address and data into a write operation for the memory unit. The accelerator has the beneficial effects that a control part is simplified, the degree of parallelism of a multi-channel convolution operation and memory access efficiency can be greatly improved, and occupied resources are reduced.

Description

technical field [0001] The invention relates to a hardware architecture for accelerating convolution operations, in particular to a reconfigurable CNN high-concurrency convolution accelerator. Background technique [0002] On the one hand, with the continuous improvement of semiconductor process technology, the computing performance of the processor has been further improved, on the other hand, the explosive development of the mobile Internet, the massive data generated can be easily obtained. Under this background, the neural network has obtained a new development, especially in the fields of image recognition, speech recognition and other key breakthroughs. The convolutional layer in the convolutional neural network belongs to the multi-channel two-dimensional convolution operation, and the size of the input feature map is set to S f ×S f ×C f , the convolution kernel size is S k ×S k ×C f ×C k , the output size is S o ×S o ×C o , the convolution stride is S. th...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): G06N3/04
CPCG06N3/045
Inventor 李丽鲍贤亮李宏炜丰帆李伟
Owner NANJING UNIV
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