The invention discloses an addressable test 
chip and a test method thereof. The test 
chip consists of an addressable circuit, a plurality of test frameworks and a plurality of 
test structure groups which are placed among the test frameworks, wherein the addressable circuit consists of a 
peripheral address decoding circuit and a plurality of switch circuits. The 
peripheral address decoding circuit consists of a row address decoding circuit, a column address decoding circuit and a pin selection decoding circuit. All the input ends of the row address decoding circuit, the column address decoding circuit and the pin selection decoding circuit are connected with a PAD set, and the output ends are connected with the switch circuits; the switch circuits are also connected to a PAD 
signal location by the plurality of 
signal lines; the switch circuits are connected with the 
test structure groups by the test frameworks. During test, the test frameworks are selected by row address signals and column address signals, 
signal selection pins are selected by pin selection signals, and test structures are tested by test signals. By means of the pin selection circuit, the addressable test 
chip and the test method can test the 
test structure group with a plurality of pins.