Method and device for simulating ageing of digital circuit

A digital circuit and simulation method technology, applied in the electronic field, can solve problems such as low simulation efficiency and low simulation accuracy, and achieve the effects of simplifying the operation process, improving simulation efficiency, and speeding up

Active Publication Date: 2018-11-13
HUAWEI TECH CO LTD
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Problems solved by technology

[0007] In order to solve the problem of low simulation accuracy and low simulation efficiency of aging s

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  • Method and device for simulating ageing of digital circuit
  • Method and device for simulating ageing of digital circuit
  • Method and device for simulating ageing of digital circuit

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[0045] In order to make the objectives, technical solutions, and advantages of the present application clearer, the following will further describe the embodiments of the present application in detail with reference to the accompanying drawings.

[0046] For the convenience of subsequent description, before the detailed explanation of the embodiments of the present invention, the terms involved in the embodiments of the present invention will be explained first.

[0047] System on Chip (SOC): Integrating a large number of transistors on a chip to form a micro-miniature system for implementing specific functions.

[0048] Static Timing Analysis (STA): Static timing analysis is a very important aspect in the design of large-scale digital integrated circuits. In the design process of digital circuits, in order to obtain the best circuit design, timing analysis plays a key role in the structural logic and layout of digital circuits. The static sequence analysis is to check whether the d...

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Abstract

The invention discloses a method and a device for simulating ageing of a digital circuit and belongs to the technical field of electronics. The method comprises the following steps: for each time sequence path of a digital circuit, acquiring state information of each module in the time sequence path, wherein the state information includes input voltage conversion time, an output load and a signalprobability during actual running of the digital circuit; respectively calculating an ageing sensitive amount of each module based on the state information of each module; based on the ageing sensitive amount of each module, respectively acquiring parameter information of each module from a corresponding relation between the stored ageing sensitive amount and the parameter information; and determining time sequence information of the time sequence path based on the parameter information of each module. Since the single probability is included in the state information, is an important factor todecide an ageing degree in the actual running of the circuit and is related to a concrete structure of the digital circuit, the time sequence information determined according to the state informationbetter conforms to the actual situation of the digital circuit, and the simulation precision is improved.

Description

technical field [0001] The present application relates to the field of electronic technology, in particular to a digital circuit aging simulation method and device. Background technique [0002] With the improvement of circuit manufacturing technology and the reduction of transistor process size, the manufacturing process of digital circuits has entered the nanometer era. Under the conditions of nanotechnology, the performance and integration of digital circuits have been greatly improved, but at the same time, the substantial reduction in transistor process size has also caused a sharp increase in the integration, complexity, and power consumption density of digital circuits. , and the reliability of the digital circuit itself has been seriously threatened. Among many factors affecting the reliability of digital circuits, the aging effect of digital circuits is one of the main factors. Because aging will degrade the performance of digital circuits, in the design process o...

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Application Information

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IPC IPC(8): G06F17/50
CPCG06F30/367G06F2119/04
Inventor 孙永生湛灿辉付一伟
Owner HUAWEI TECH CO LTD
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