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A gpdsp-oriented multi-core parallel computing implementation method

An implementation method and parallel computing technology, applied in computing, computers, digital computer components, etc., can solve the problems of inability to realize parallel programming of CPU and multiple DSP cores, inability to perform parallel programming of GPDSP, and inability to effectively exert the computing power of GPDSP, and achieve The effect of simplifying debugging, ensuring reliability and stability

Active Publication Date: 2019-09-10
NAT UNIV OF DEFENSE TECH
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

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Problems solved by technology

[0003] Since GPDSP is a heterogeneous multi-core processor including CPU core and DSP core, including register files, on-chip vector array memory, on-chip shared memory array, off-chip DDR memory and other multi-level storage architectures, heterogeneous multi-core parallel programming for GPDSP , there is no effective solution at present. If the method of isomorphic multi-core parallel programming is simply applied directly, the powerful computing power of GPDSP cannot be effectively utilized.
If the existing CPU multi-core processor runs a general-purpose operating system, it usually provides a general-purpose parallel programming method based on OPENMP or MPI. However, as mentioned above, in addition to multiple CPU cores, GPDSP also includes multiple 64-bit vector processing arrays. DSP core, and the main computing performance is provided by the DSP core. If the existing general-purpose parallel programming method based on OPENMP or MPI is directly used, parallel programming between the CPU and multiple DSP cores cannot be realized, that is, it cannot be applied to GPDSP to realize multi-core parallel programming

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  • A gpdsp-oriented multi-core parallel computing implementation method
  • A gpdsp-oriented multi-core parallel computing implementation method
  • A gpdsp-oriented multi-core parallel computing implementation method

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Embodiment Construction

[0035] The present invention will be further described below in conjunction with the accompanying drawings and specific preferred embodiments, but the protection scope of the present invention is not limited thereby.

[0036] Such as figure 1 As shown, the present embodiment is oriented to the multi-core parallel computing implementation method of GPDSP, and the steps include:

[0037] S1. Divide the target GPDSP application program into the main frame part and the core computing part, build the CPU program module to realize the main frame part at the CPU side in GPDSP, and build the DSP program module to realize the core computing part at the DSP side, and the CPU program module Call the DSP program module;

[0038] S2. Compiling the DSP program module at the DSP side and the CPU program module at the CPU side respectively, and then linking the compiled DSP program module and the CPU program module to obtain the single-chip GPDSP program;

[0039] S3. Run the GPDSP program. W...

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Abstract

The invention discloses a multi-core parallel computation implementation method for a general-purpose digital signal processor (GPDSP). The method comprises the steps of S1, building a CPU program module for implementing a main body frame part on a CPU side in GPDSP, building a DSP program module for implementing a core computation part on a DSP side, and calling the DSP program module via the CPUprogram module; S2, separately compiling the DSP program module on the DSP side and compiling the CPU program module on the CPU side, and then compiling in a unified manner to acquire a single chip GPDSP program; and S3, when the GPDSP program is running, and the CPU program module in the program is executed, performing a specified computation task through calling the DSP program module, and computing in parallel by using multiple DSP cores. According to the method provided by the invention, the high performance of the multi-core CPU and the high performance of the multi-core DSP can be fullyused for achieving multi-core parallel computation, and the implementation method has the advantages of being simple, convenient to use, flexible to use and efficient.

Description

technical field [0001] The present invention relates to the technical field of GPDSP (General-Purpose Digital Signal Processor, general-purpose computing digital signal processor), in particular to a method for implementing GPDSP-oriented multi-core parallel computing. Background technique [0002] As a heterogeneous multi-core processor, GPDSP includes both a CPU core unit and a DSP core unit. The CPU core unit is mainly responsible for general transaction management including storage management, file control, process scheduling, and interrupt management tasks. As well as providing complete support for general-purpose operating systems, the DSP core unit includes several 64-bit vector processing arrays with powerful computing capabilities to support the resolution of highly intensive computing tasks. [0003] Since GPDSP is a heterogeneous multi-core processor including CPU core and DSP core, including register files, on-chip vector array memory, on-chip shared memory array...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): G06F15/163G06F8/41G06F9/448
Inventor 刘仲郭阳扈啸田希陈海燕鲁建壮陈跃跃孙永节王耀华吴家铸王丽萍
Owner NAT UNIV OF DEFENSE TECH
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