Multi-core parallel computation implementation method for general-purpose digital signal processor (GPDSP)

Abstract

The invention discloses a multi-core parallel computation implementation method for a general-purpose digital signal processor (GPDSP). The method comprises the steps of S1, building a CPU program module for implementing a main body frame part on a CPU side in GPDSP, building a DSP program module for implementing a core computation part on a DSP side, and calling the DSP program module via the CPUprogram module; S2, separately compiling the DSP program module on the DSP side and compiling the CPU program module on the CPU side, and then compiling in a unified manner to acquire a single chip GPDSP program; and S3, when the GPDSP program is running, and the CPU program module in the program is executed, performing a specified computation task through calling the DSP program module, and computing in parallel by using multiple DSP cores. According to the method provided by the invention, the high performance of the multi-core CPU and the high performance of the multi-core DSP can be fullyused for achieving multi-core parallel computation, and the implementation method has the advantages of being simple, convenient to use, flexible to use and efficient.

Description

technical field [0001] The invention relates to the technical field of GPDSP (General-Purpose Digital Signal Processor, general-purpose computing digital signal processor), in particular to a GPDSP-oriented multi-core parallel computing implementation method. Background technique [0002] As a heterogeneous multi-core processor, GPDSP includes both a CPU core unit and a DSP core unit. The CPU core unit is mainly used for general transaction management including storage management, file control, process scheduling, and interrupt management tasks. As well as providing complete support for general-purpose operating systems, the DSP core unit contains several 64-bit vector processing arrays with powerful computing power to support the solution of high-intensity computing tasks. [0003] Since GPDSP is a heterogeneous multi-core processor including CPU core and DSP core, including register file, on-chip vector array memory, on-chip shared memory array, off-chip DDR memory and oth...

AI Technical Summary

Problems solved by technology

[0003] Since GPDSP is a heterogeneous multi-core processor including CPU core and DSP core, including register files, on-chip vector array memory, on-chip shared memory array, off-chip DDR memory and other multi-level storage architectures, heterogeneous multi-core parallel programming for GPDSP , there is no effective solution at present. If the method of isomorphic multi-core parallel programming is simply applied directly, the powerful computing power of GPDSP cannot be effectively utilized.

If the existing CPU multi-core processor runs a general-purpose operating system, it usually provides a general-purpose parallel programming method based on OPENMP or MPI. However, as mentioned above, in addition to multiple CPU cores, GPDSP also includes multiple 64-bit vector processing arrays. DSP core, and the main computing performance is provided by the DSP core. If the existing general-purpose parallel programming method based on OPENMP or MPI is directly used, parallel programming between the CPU and multiple DSP cores cannot be realized, that is, it cannot be applied to GPDSP to realize multi-core parallel programming

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