Memory device and operating method of memory device

Abstract

A memory device includes a memory cell array that includes memory cells, a row decoder that is connected to the memory cell array through word lines, a column decoder that is connected to the memory cell array through bit lines and source lines, a write driver that transfers a write voltage to a bit line, which is selected by the column decoder, from among the bit lines by using a gate voltage ina write operation, and control logic that generates the gate voltage. The gate voltage is higher than the write voltage.

Description

[0001] Cross References to Related Applications [0002] This application claims priority from Korean Patent Application No. 10-2017-0080526 filed on June 26, 2017 and Korean Patent Application No. 10-2018-0015247 filed on February 7, 2018 at the Korean Intellectual Property Office , the disclosure of which is incorporated herein by reference in its entirety. technical field [0003] Embodiments of the inventive concepts described herein relate to semiconductor devices, and more particularly, to memory devices and methods of operating the memory devices. Background technique [0004] A memory device may include memory cells and may store data in the memory cells. Memory devices that require power in order to retain data stored in memory cells are referred to as "volatile memory devices." Memory devices that do not require power in order to retain data stored in memory cells are referred to as "nonvolatile memory devices." [0005] An operation of storing data in a memory ...

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Problems solved by technology

[0007] Also, since memory devices are designed to be suitable for low power, the power supply voltage of memory devices is decreasing

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