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RF signal processing device

A technology of radio frequency signal and processing device, which is applied in the field of radio frequency signal processing device, and can solve the problems that the buffer memory is difficult to run the transmitting and receiving programs at the same time, and the transmission performance is not good.

Active Publication Date: 2021-08-31
RICHWAVE TECH CORP
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

However, due to the limitation of the general buffer memory, it is difficult for the buffer memory to run the transmit and receive programs at the same time. Therefore, within a limited time, the buffer memory is also difficult to fill up, which limits the amount of data transmission, resulting in poor transmission performance.

Method used

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  • RF signal processing device
  • RF signal processing device
  • RF signal processing device

Examples

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no. 1 example

[0114] Figure 8 It shows one embodiment of the program for transmitting data between two radio frequency signal processing devices respectively installed on different hosts. The illustrated system includes a first radio frequency signal processing device 81, which may be a slave transceiver (slave) of a transmission system, provided with a buffer memory circuit 812, through a host interface 811 communicating with an external host (not shown in this figure) , through the processor 813 to perform analog and digital signal conversion, through the radio frequency circuit 814 to send and receive radio frequency signals, especially to communicate with the second radio frequency signal processing device 82 . The second radio frequency signal processing device 82 can be such as the main transceiver (master) of the transmission system, and the main circuit units such as the host interface 821, the buffer memory circuit 822, the processor 823 and the radio frequency circuit 824 with th...

no. 2 example

[0127] According to a second embodiment, implementations such as image 3 In the described hardware architecture, a single RF signal processing device 30 includes a host interface 301 connected to an external host, a buffer memory circuit 302 (including a controller 3020 for controlling the operation of the buffer memory, a first buffer memory 3021 and a second buffer memory 3022 ), The processor 303 for processing signal conversion, and the radio frequency circuit 304 for performing radio frequency signal transceiving, and may include an antenna unit (not shown). Wherein, the first buffer memory 3021 is divided into a first receive buffer 3021a and a first transmit buffer 3021b according to the division of labor between transmit and receive, and the second buffer memory 3022 includes a second receive buffer 3022a and a second transmit buffer 3022b . Wherein, the first buffer memory 3021 and the second buffer memory 3022 can be physically independent buffer memory blocks, and...

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Abstract

The invention discloses a radio frequency signal processing device, which includes a processor and a buffer memory circuit, and is provided with a host interface connected with a host, and a radio frequency circuit for transmitting and receiving radio frequency signals. The processor is used for processing the radio frequency signal received or transmitted by the radio frequency circuit, and digitally converts the received radio frequency signal into a data, or converts the data into a transmitted radio frequency signal. There is a controller and two buffer memories in the buffer memory circuit. Under this buffer memory architecture, when the system is operating in one of the buffers, the other buffer can also handle other work without being affected by one buffer at a time. Only one job can be performed, and the problem of insufficient data transmission due to insufficient buffer memory in the prior art is solved.

Description

technical field [0001] The present invention relates to a signal processing device, in particular to a radio frequency signal processing device including two sets of buffer memories (buffermemory). Background technique [0002] The wireless signal transceiver in the prior art has a buffer memory for temporarily storing data to be transmitted and written. However, according to the limitation of the general buffer memory, it is difficult for the buffer memory to run the transmit and receive programs at the same time. Therefore, the buffer memory is also difficult to fill up within a limited time, which limits the amount of data transmission, resulting in poor transmission performance. Contents of the invention [0003] According to an embodiment, a radio frequency signal processing device includes a processor and a buffer memory circuit. The processor is used for processing the radio frequency signal received or transmitted through the radio frequency circuit, and the proce...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): H04B1/40
CPCH04B1/40G06F13/1673G11B20/10009H04L1/1835H04W28/0278
Inventor 许汉桐詹文正
Owner RICHWAVE TECH CORP
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