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MEMORY DEVICE and operation method thereof

A memory device, a technology of memory bit cells, applied in the field of semiconductors, which can solve the problems of wasting time and power, memory devices and stored data bits are not completely satisfactory

Active Publication Date: 2019-07-23
TAIWAN SEMICON MFG CO LTD
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

For example, faulty data bits contained in the first word are rewritten into correspondingly configured memory bit cells, faulty data bits contained in the second word are rewritten into correspondingly configured memory bit cells, and so on, It's a waste of time and power
Therefore, existing memory devices and methods of storing data bits are not entirely satisfactory

Method used

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  • MEMORY DEVICE and operation method thereof
  • MEMORY DEVICE and operation method thereof
  • MEMORY DEVICE and operation method thereof

Examples

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Embodiment Construction

[0013] The following disclosure describes various exemplary embodiments to achieve different features of the subject matter. Specific examples of components and arrangements are described below to simplify the present disclosure. Of course, these are merely examples and are not intended to limit the invention. For example, it will be understood that when an element is referred to as being "connected" or "coupled" to another element, it can be directly connected or coupled to the other element or one or more intervening elements may be present.

[0014] The present invention provides various embodiments of memory devices including control logic configured to rewrite one or more failed data bits to correspondingly configured memory bit cells on a data word-by-block basis. In some embodiments, in response to determining that one or more faulty data bits exist within such a plurality of data words, the control logic may initiate a grouping operation of the plurality of data words...

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Abstract

The invention discloses a circuit of a memory device, and a method comprises the steps: writing a plurality of data words, each of which has a plurality of data bits, into respective bit cells of a memory device; in response to determining that not all the data bits of the plurality of data words are correctly written into the respective bit cells of the memory device, grouping the plurality of data words as a plurality of data word sets; and simultaneously rewriting a subset of data bits that were not correctly written into the respective bit cells of the memory device, wherein the subset ofthe data bits are contained in a respective one of the plurality of data word sets.

Description

technical field [0001] Embodiments of the present invention generally relate to the field of semiconductor technologies, and more particularly, to memory devices and methods of operating the same. Background technique [0002] Memory devices are commonly used in many types of electronic devices such as computers, cell phones, tablet computers, data loggers and navigation devices, to name a few. Typically, in such memory devices, write operations are used to store information as bits of data. In some cases, there may be multiple data words, each data word including multiple data bits, where the data bits are configured to be written to corresponding memory bit cells of the memory device. Occasionally, the corresponding write operation may fail. For example, one or more data bits in multiple data words may not be correctly written to configured memory bit cells. Such data bits are often referred to as fault data bits. [0003] To remedy such faulty data bits, techniques us...

Claims

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Application Information

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IPC IPC(8): G06F3/06
CPCG06F3/0614G06F3/0631G06F3/0656G11C29/52G11C16/10G11C16/3459G06F11/1068G11C16/08G11C29/00G11C16/26
Inventor 池育德刘建瑛史毅骏
Owner TAIWAN SEMICON MFG CO LTD
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