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A method for binary array tensor processor

A two-dimensional array and array technology, applied in the field of binary array tensor processors, can solve problems such as high-precision computing devices without binary neural networks

Active Publication Date: 2019-07-26
广州异构智能科技有限公司
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  • Abstract
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  • Application Information

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Problems solved by technology

There is currently no high-precision computing device for binarized neural networks

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  • A method for binary array tensor processor
  • A method for binary array tensor processor
  • A method for binary array tensor processor

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Embodiment Construction

[0023] The drawings and the following description are by way of example only. It should be understood from the following discussion that alternative embodiments of the structures and methods disclosed herein are readily considered as viable alternatives that may be employed without departing from the principles claimed.

[0024] see figure 1 , a tensor processor in an implementation manner includes an input-output bus 100, multiple PEs, and a ping-pong controller 102 connected to the multiple PEs. The input-output bus 100 receives input data (such as being represented as image data of third-order or higher-order tensors or feature tensors comprising image feature values) from the outside, and transmits the input data to the ping-pong controller 102 and from the ping-pong controller 102 After receiving the output data, it is output to the outside. The input and output bus 100 can receive convolution kernel data from the outside (the convolution kernel data can be a set of wei...

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Abstract

A method for a binary array tensor processor calculates a convolution operation result of a feature tensor and a convolution kernel tensor using a processing engine two-dimensional array. The method comprises the following steps: distributing an ID for each group of characteristic values and weights; distributing a feature local ID and a weight local ID for each processing engine; each processingengine receives a set of characteristic values in a matching manner by comparing the characteristic local ID and the characteristic ID of the processing engine; enabling each processing engine to receive a set of weight values in a matching manner by comparing the weight local ID and the weight ID of the processing engine; carrying out convolution operation on the matched characteristic values andweight values by each processing engine to obtain an intermediate result; and superposing a plurality of intermediate results and taking the superposed intermediate results as convolution operation results of the feature tensor and the convolution kernel tensor. According to the method, the input tensor data can be processed at a high speed, and the input tensor data of different dimensions can be flexibly coped with.

Description

technical field [0001] The present disclosure relates to neural network convolution operation tensor processors, and in particular, to methods for binary array tensor processors. Background technique [0002] The neural network establishes a model structure by simulating the neural connection structure of the human brain, which is currently a hot spot in academic research and enterprise research and development. Current neural networks, especially convolutional neural networks for image processing and object recognition, need to process a large amount of data represented as third-order or higher-order tensors, and also need to process tensor data with different shapes and sizes. Therefore, there is a need for a neural network-specific computing device capable of processing third-order or higher-order tensor data of various shapes at high speed. In addition, the binarized neural network refers to a neural network after binarization of weight values ​​and / or input data. Ther...

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): G06N3/04
CPCG06N3/045
Inventor 陈柏纲许喆丁雪立
Owner 广州异构智能科技有限公司