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memory controller

A memory controller, storage array technology, applied in static memory, digital memory information, information storage, etc., can solve the problem of memory controller spending a lot of time

Active Publication Date: 2021-08-17
VIA ALLIANCE SEMICON CO LTD
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

Because the memory controller may switch from the first read operation to the first write operation, then switch from the first write operation to the second read operation, and then switch from the second read operation to the second write operation, so The memory controller spends a lot of time switching

Method used

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Embodiment Construction

[0009] In order to make the purpose, features and advantages of the present invention more comprehensible, the following specifically cites the embodiments, together with the accompanying drawings, for a detailed description. The description of the present invention provides different examples to illustrate the technical features of different implementations of the present invention. Wherein, the configuration of each component in the embodiment is for illustration, not for limiting the present invention. In addition, the partial repetition of the symbols in the figures in the embodiments is for the purpose of simplifying the description, and does not imply the correlation between different embodiments.

[0010] figure 1 It is a schematic diagram of the operating system of the present invention. Such as figure 1 As shown, the operating system 100 includes a memory controller 110 , a storage array 120 and an external device 130 . The memory controller 110 accesses the memor...

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Abstract

A memory controller includes a receiving circuit, a control circuit and a processing circuit. The receiving circuit receives the first write command, the first write data, the second write command and the second write data. The control circuit judges whether the first write command and the second write command are partial write commands. When the first write command and the second write command are partial write commands, during the read period, the processing circuit reads the memory array according to the first write command and the second write command to generate the first read data and the second read data. The control circuit modifies the first written data and the second written data according to the first read data and the second read data to generate first modified data and second modified data. During writing, the processing circuit writes the first modified data and the second modified data back to the memory array.

Description

technical field [0001] The present invention relates to a memory controller, in particular to a memory controller executing a partial write command. Background technique [0002] Generally speaking, a memory controller is used to access a memory array. When the memory controller receives a read instruction, the memory controller reads the memory array. When the memory controller receives the write command, the memory controller writes data into the storage array. When the memory controller receives a partial write command, the memory controller needs to perform a read-modify-write operation. For example, the memory controller first reads the memory array, modifies the read result, and then writes the modified result back to the memory array. [0003] When the memory controller receives multiple partial write commands, the memory controller needs to constantly switch operations. For example, assume that the memory controller receives the first partial write command and th...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): G11C7/22G06F3/06
CPCG06F3/0638G06F3/0658G11C7/22
Inventor 陈忱沈鹏郑秀玉施宏彦
Owner VIA ALLIANCE SEMICON CO LTD