Endurance test device and method for semiconductor device
A testing device and semiconductor technology, applied in the direction of single semiconductor device testing, measuring devices, instruments, etc., can solve the problems of high failure rate and limited current rise rate tolerance, and achieve the effect of reducing the failure rate
Active Publication Date: 2022-02-25
JILIN SINO MICROELECTRONICS CO LTD
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Problems solved by technology
[0002] In the application process of high-power semiconductor devices, the inventors of the present application found that due to the limited tolerance of the current rise rate (di / dt), the failure rate is relatively high
Although the traditional methods have relevant protective measures on the application circuit, it is extremely difficult to completely eliminate the phenomenon that the ultra-high current rise rate does not appear in any special case
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[0051] Next, the technical solutions in the present application embodiment will be described in the following examples, and the embodiments described herein are described herein, not all of the embodiments of the present disclosure. Components of the present application embodiments described and illustrated in the drawings herein can be arranged and designed in a variety of different configurations.
[0052] Thus, the following detailed description of the embodiments of the present application provided in the drawings is not intended to limit the scope of the present application claimed, but only the selected embodiments of the present application. Based on the embodiments in the present application, one of ordinary skill in the art does not have all other embodiments obtained under the premise of creative labor, which are the scope of the present application.
[0053] It should be noted that similar reference numerals and letters represent the similar items in the following figur...
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The embodiment of the present application provides a semiconductor device endurance test device and method. The current impact unit inputs a current impact signal to the semiconductor device to be tested according to the set peak current value, set current rise rate, and set pulse period, and passes the test. After the unit tests the current impact signal on the semiconductor device to be tested, the number of test pulses of the current impact signal, and the device status of the semiconductor device to be tested, the main control unit The number of times and the device state of the semiconductor device under test generate a current rise rate tolerance value of the semiconductor device under test. In this way, the current rise rate withstand capability of the semiconductor device can be effectively quantified, so as to accurately evaluate the current rise rate withstand capability of the semiconductor device in the future, and then necessary measures can be taken to reduce the failure rate of the semiconductor device.
Description
Technical field [0001] In particular, the present application relates to the technical field of semiconductor devices, and in particular, it relates to a measurement test apparatus and method of semiconductor devices. Background technique [0002] During the application of high-power semiconductor devices, the application inventors have been found that due to the limited tolerance capacity of the current increase, it results in a high degree of failure ratio. Although traditional means have relevant protective measures on the application circuit, it is difficult to completely eliminate the phenomenon of ultra-high current increase in any special case. Thus, for semiconductor devices, there is a need to have appropriate current rise in tolerance. Based on this, how to effectively quantify the current rise rate tolerance of the semiconductor device to facilitate the subsequent accurate assessment of the current rise rate tolerant ability of the semiconductor device, thereby adoptin...
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IPC IPC(8): G01R31/26
CPCG01R31/2601
Inventor 赵建伟姜明宝李强
Owner JILIN SINO MICROELECTRONICS CO LTD