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Compiling processing method and device for width asymmetric vector compatibility under heterogeneous platform

A technology of heterogeneous platforms and processing devices, applied in the computer field, can solve problems such as increasing the development cycle and affecting the development of compiler inheritance.

Active Publication Date: 2021-03-05
JIANGNAN INST OF COMPUTING TECH
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Problems solved by technology

[0005] At the same time, in terms of the compatibility of asymmetric short vectors in the heterogeneous processor platform, more design ideas are adopted to fight each other, using different front-end, middle-end and back-end assemblers to translate the code, and finally perform binary translation in the linking stage. Code merging and relocation, so in the design of the compiler, it is necessary to follow two sets of standard compiler development processes, which greatly affects the inheritance development of the compiler and increases the development cycle

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  • Compiling processing method and device for width asymmetric vector compatibility under heterogeneous platform

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Embodiment

[0019] Embodiment: A compiling and processing device for width asymmetric vector compatibility under heterogeneous platforms, comprising the following modules:

[0020] The compiler preprocessing module is used for uniform declaration of asymmetric heterogeneous vectors, and is also used to control the target preprocessing of corresponding data and interface calls through compilation options, and convert the vector interface in the program into the corresponding platform itself. interface;

[0021] The front-end middle-end analysis module of the compiler is used to convert the internal intermediate representation or vector downgrade according to the calling method of the interface, and generate the intermediate representation of the corresponding platform;

[0022] The compiler backend code generation module is configured to generate corresponding backend instructions according to the intermediate representation.

[0023] A compiling and processing method based on the compili...

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Abstract

The invention discloses a compiling processing method and device for width asymmetric vector compatibility under a heterogeneous platform. The device comprises the following modules: a compiler preprocessing module which is used for carrying out the unified declaration of asymmetric heterogeneous vectors, and is also used for controlling the target preprocessing of corresponding data and interfacecall through compiling options, converting into an interface adaptive to the corresponding platform; a compiler front-end and middle-end analysis module is used for performing conversion or vector degradation of internal intermediate representation according to the calling mode of the interface to generate intermediate representation of a corresponding platform; and a compiler rear-end splittingmodule is used for generating a corresponding rear-end instruction according to the intermediate representation. According to the method, the inheritance of vector development of the master-slave corecompiler is realized, the heterogeneous coding limitation of a user program is reduced, and the difference of vector support of a heterogeneous platform does not need to be concerned.

Description

technical field [0001] The invention relates to a compiling and processing method and device for width asymmetrical vector compatibility under heterogeneous platforms, belonging to the technical field of computers. Background technique [0002] Vector computing is already an effective means of improving instruction parallelism, and more and more users are trying to modify traditional programs into short-vector SIMD programs to tap the parallelism of data and instructions. With the development of processors, the vector width is also widening from generation to generation, from the original 64-bit traditional scalar to the current mainstream 512-bit vector width, and even higher 1024-bit vector width processors have appeared. [0003] At present, heterogeneous many-core is the development trend of high-performance computing hardware platforms, but under the constraints of power consumption, area, and frequency, the difference between master-slave heterogeneous designs is also ...

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Application Information

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IPC IPC(8): G06F8/41
CPCG06F8/41Y02D10/00
Inventor 王飞钱宏沈莉吴伟管茂林周文浩朱琪武文浩
Owner JIANGNAN INST OF COMPUTING TECH
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