Memory device and in-memory computing method thereof

Abstract

The invention discloses a memory device and an in-memory computing method thereof, wherein the in-memory computing method is executed in the memory device, and comprises the following steps of expanding a core into a plurality of sub-cores and a plurality of complementary sub-cores according to a movement parameter; writing a plurality of weight values into a plurality of target memory cells of a memory array of the memory device according to the sub-cores and the complementary sub-cores; inputting an input data to a selected word line of the memory array; executing a mobile operation in the memory array; temporarily storing the sum of the multiple parts; and when all the operation periods are completed, summing the temporarily stored partial sums to obtain a mobile operation result.

Description

technical field

[0001] The present invention relates to a memory device and its calculation method in the memory. Background technique

[0002] Data movement is a major energy cost when performing deep learning training. Ideally, applying computing in memory can reduce energy consumption by 25%, because the amount of moving weight values ​​is reduced.

[0003] figure 1 A schematic diagram showing the implementation of multiplication and accumulation (MAC) as an in-memory computation. The memory cells C1 to C3 are respectively written with the weight values ​​W1 to W3. Input values ​​I1~I3 can be written to word lines or bit lines (in figure 1 Take writing to word lines WL1-WL3 as an example for illustration). Then the cell currents of the memory cells C1 - C3 are respectively I1 × W1 , I2 × W2 and I3 × W3 . After the cell current is sensed by the sense amplifier (SA) 110 , I1×W1+I2×W2+I3×W3 can be output.

[0004] When calculating in the memory, take a convolutional n...

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