Memory failure address output method and related equipment

A failure address and memory technology, applied in static memory, instruments, etc., can solve the problems of affecting output efficiency and time-consuming

Pending Publication Date: 2021-06-08
XI AN UNIIC SEMICON CO LTD
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  • Abstract
  • Description
  • Claims
  • Application Information

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Problems solved by technology

[0005] The embodiment of the present application provides a memory failure address output method and related equipment to solve the problem that the current process of outputting the failure address through the ATE device takes too long and affects the output efficiency.

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  • Memory failure address output method and related equipment
  • Memory failure address output method and related equipment
  • Memory failure address output method and related equipment

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Embodiment Construction

[0086] The present invention will be described in further detail below in conjunction with the accompanying drawings and embodiments, so that those skilled in the art can implement it with reference to the description.

[0087] It should be understood that terms such as "having", "comprising" and "including" used herein do not exclude the presence or addition of one or more other elements or combinations thereof.

[0088] In addition, it should be noted that, unless otherwise specified and limited, the terms "setting" and "connection" should be understood in a broad sense. For example, it may be a fixed connection or a detachable connection; it may be a direct connection or an indirect connection through an intermediary; it may be an integral connection or an internal communication between two components. Signal transmission and data communication can also be performed between two components. Those of ordinary skill in the art can understand the specific meanings of the above...

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Abstract

The embodiment of the invention provides a method for outputting a failure address of a memory and related equipment, which are used for solving the problem that the efficiency of the existing process for outputting the failure address of the memory is relatively low. The method comprises the steps that structure information of a target memory is obtained; failure information is recorded according to the test data, the test data are failure addresses obtained after the test device tests the target memory, and the failure information comprises the number of the failure addresses contained in each level in the target memory; according to the failure information, analysis is carried out according to the hierarchy, the failure type of the target memory is determined, the failure type comprises a first failure type and a second failure type, the first failure type is used for representing that failure units in the target memory fail according to the whole hierarchy, and the second failure type is used for representing that the failure units are distributed in a scattered mode; according to a preset output strategy, corresponding output modes are selected for output according to the failure types, and the preset output strategy comprises the output mode corresponding to each failure type.

Description

technical field [0001] Embodiments of the present invention relate to the field of chip technology, and in particular, relate to a memory failure address output method and related equipment. Background technique [0002] With the development of technology, the stability and reliability of the chip are gradually being paid attention to by people. Among them, in order to detect the failure of the memory in the chip, people often use ATE (Automatic Test Equipment, ATE for short) to test the chip. test. Generally speaking, after the detection, the failure address in the memory will be output, so that the user can perform subsequent operations such as repair. [0003] At present, when using ATE to output the detected failure address in the chip, the common method is to record the failure address in the failure address storage area of ​​ATE during the test, and then obtain all the failure addresses by reading the failure address storage area. and output to the user. However, in...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): G11C29/56
CPCG11C29/56008G11C29/56016G11C2029/5604G11C2029/5606
Inventor 张朝锋王春娟
Owner XI AN UNIIC SEMICON CO LTD
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