Packaging structure, packaging method, camera module and electronic equipment

Abstract

The embodiment of the invention provides a packaging structure, a packaging method, a camera module and electronic equipment, relates to the technical field of packaging, and aims to effectively reduce the size of a packaging structure. The packaging structure comprises: a chip packaging module, wherein the chip packaging module comprises a light-transmitting substrate; a rewiring layer located on one side of the light-transmitting substrate and comprising a first metal wire; an electric conductor located on the side, back to the light-transmitting substrate, of the rewiring layer and comprising a second end and a first end electrically connected with the first metal wire; a photosensitive chip located on the side, back to the light-transmitting substrate, of the rewiring layer, wherein the pin of the photosensitive chip is electrically connected with the first metal wire, the photosensitive chip comprises a photosensitive surface facing the light-transmitting substrate, the photosensitive surface comprises a photosensitive area, and the first metal wire and the photosensitive area are not overlapped; an active chip located on the side, back to the light-transmitting substrate, of the rewiring layer, wherein the pin of the active chip is electrically connected with the first metal wire; and a plastic packaging layer wrapping the photosensitive chip and the active chip.

Description

【Technical field】 [0001] The invention relates to the field of packaging technology, in particular to a packaging structure and packaging method, a camera module and electronic equipment. 【Background technique】 [0002] A CMOS image sensor (CMOS Image Sensor, CIS) chip is an electronic device that can sense external light and convert it into an electrical signal, and is widely used in electronic devices such as cameras. The CIS chip is usually manufactured using a semiconductor manufacturing process, and then a package structure is formed by performing a series of packaging processes on the CIS chip. However, the packaging structure of the existing CIS chip is relatively large, which is not conducive to the realization of thin and light design of electronic equipment. In addition, the existing CIS chips require a large number of wire bonding and routing in plastic or ceramic substrates, and the yield rate is low. 【Content of invention】 [0003] In view of this, the embod...

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