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Memory cell, memory array and operation method using the same

A technology for memory cells and memory arrays, applied in the field of memory arrays, can solve the problems of memory cell output current fluctuation, physical parameter range fluctuation, and inability to be fixed at the designed value, etc.

Pending Publication Date: 2022-01-25
MACRONIX INT CO LTD
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  • Abstract
  • Description
  • Claims
  • Application Information

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Problems solved by technology

However, the actual value of the physical parameter used to represent the storage state usually cannot be fixed at the designed value, and these physical parameters may be degraded due to constraints such as programming accuracy and thermal noise. There is a large change in the range
[0003] And if the physical parameters of the memory cell have a large change, the output current of the memory cell may also have a large change
This will easily lead to reliability and / or accuracy issues

Method used

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  • Memory cell, memory array and operation method using the same
  • Memory cell, memory array and operation method using the same
  • Memory cell, memory array and operation method using the same

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Embodiment Construction

[0039] In order to make the object, technical solution and advantages of the present invention clearer, the present invention will be described in further detail below in conjunction with specific embodiments and with reference to the accompanying drawings.

[0040] The technical terms in this specification refer to the customary terms in this technical field. If some terms are explained or defined in this specification, the interpretation of these terms shall be based on the description or definition in this specification. Each embodiment of the present disclosure has one or more technical features respectively. On the premise of possible implementation, those skilled in the art may selectively implement some or all of the technical features in any embodiment, or selectively combine some or all of the technical features in these embodiments.

[0041] Please refer to figure 1 , which shows a structural diagram of a memory cell according to an embodiment of the present inventi...

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Abstract

The invention discloses a memory cell, a memory array and an operation method using the same. The memory cell includes: a transistor having a control terminal coupled to a first node; a first terminal coupled to a first signal line; a second terminal coupled to a second signal line; a first resistance element, having a first terminal coupled to the first node and a second terminal coupled to a second node; and a second resistance element, having a first terminal coupled to the first node and a second terminal coupled to a third node.

Description

technical field [0001] The invention relates to a memory unit, a memory array using it and an operation method. Background technique [0002] The storage state of a memory cell is represented by physical parameters of the memory cell (eg, resistance value, capacitance value) and the like. However, the actual value of the physical parameter used to represent the storage state is usually not fixed at the designed value, and these physical parameters may be degraded due to constraints such as programming accuracy and thermal noise. There are large changes in the range. [0003] And if the physical parameter of the memory cell has a large change, the output current of the memory cell may also have a large change. This will easily lead to reliability and / or accuracy problems. [0004] In addition, conventionally, the impedance state of a memory cell (either a high impedance state representing a logic 1 or a low impedance state representing a logic 0) can be determined from the...

Claims

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Application Information

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IPC IPC(8): G11C7/10
CPCG11C7/1051G11C7/02G11C7/04G11C13/004G11C2013/0045G11C13/0069G11C13/0023G11C5/063G11C13/0064G11C11/5621G11C13/0038
Inventor 李明修
Owner MACRONIX INT CO LTD