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Convolution operation method, computing device, computing system and storage medium

A technology of convolution operation and computing equipment, applied in the field of computing, can solve the problems of waste of computing power and low computing efficiency, and achieve the effect of improving efficiency

Pending Publication Date: 2022-02-11
SHANGHAI BIREN TECH CO LTD
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

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Problems solved by technology

For example, if the number of input channels of the weight matrix and the channel data of the input matrix are 8, but the minimum granularity of the channel for the convolution operation of a specific hardware accelerator is 16, the specific hardware accelerator will still perform the convolution operation according to the channel 16 to perform calculations, which means that half of the calculation power is wasted, and the calculation efficiency is not high

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  • Convolution operation method, computing device, computing system and storage medium
  • Convolution operation method, computing device, computing system and storage medium
  • Convolution operation method, computing device, computing system and storage medium

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Embodiment Construction

[0016] Exemplary embodiments of the present disclosure are described below in conjunction with the accompanying drawings, which include various details of the embodiments of the present disclosure to facilitate understanding, and they should be regarded as exemplary only. Accordingly, those of ordinary skill in the art will recognize that various changes and modifications of the embodiments described herein can be made without departing from the scope and spirit of the disclosure. Also, descriptions of well-known functions and constructions are omitted in the following description for clarity and conciseness.

[0017] As mentioned above, when the minimum granularity of a specific hardware accelerator for convolution operation does not match the number of channels of the input matrix or the number of input channels of the weight matrix, it will cause waste of computing power and reduce computing efficiency.

[0018] To at least partially address one or more of the above-mention...

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Abstract

The invention provides a convolution operation method and a device thereof and a storage medium, and relates to the field of calculation. The specific scheme is as follows: obtaining a weight matrix and an input matrix, wherein the weight matrix and the input matrix are divided according to blocks with the same size; performing the following transform operations iteratively one or more times for performing a convolution operation via the matrix calculation means: aligning the number of blocks included by the weight matrix on columns or rows to a minimum even number N greater than or equal to the number to generate an aligned weight matrix; stacking the aligned weight matrix on the channel dimension of the input matrix according to the front half part and the rear half part which are divided in half according to columns or rows, so as to generate a transformed weight matrix; and stacking data after the last N / 2 columns or rows of blocks in the input matrix are removed and data after the first N / 2 columns or rows of blocks in the input matrix are removed in the channel dimension to generate a transformed input matrix. Therefore, the convolution operation efficiency of the matrix calculation device can be improved.

Description

technical field [0001] The present disclosure relates to the computing field, and in particular, to a method for convolution operation, a computing device, a computing system, and a computer-readable storage medium. Background technique [0002] When using a specific hardware accelerator for convolution operations, there is a minimum granularity requirement for the number of input channels of the weight matrix or the number of channels of the input matrix. For example, if the number of input channels of the weight matrix and the channel data of the input matrix are 8, but the minimum granularity of the channel for the convolution operation of a specific hardware accelerator is 16, the specific hardware accelerator will still perform the convolution operation according to the channel 16 to perform calculations, which means that half of the calculation power is wasted, and the calculation efficiency is not high. Contents of the invention [0003] The present disclosure prov...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): G06F17/15G06F17/16
CPCG06F17/153G06F17/16
Inventor 不公告发明人
Owner SHANGHAI BIREN TECH CO LTD