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Montgomery analog multiplication algorithm for VLSI and VLSI structure of intelligent card analog multiplier

A multiplier and multiplication operation technology, which is applied in the field of computer realization of the VLSI structure of the smart card modular multiplier, can solve the problems of low operation speed and large implementation area of ​​the RSA cryptographic coprocessor modular exponentiation

Inactive Publication Date: 2005-12-07
TSINGHUA UNIV
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Problems solved by technology

However, there are currently two main problems in smart cards using the public key cryptosystem RSA for encryption: 1) The VLSI (Very Large Scale Integration) implementation area of ​​the RSA cryptographic coprocessor is too large; 2) The modular exponentiation operation speed of the RSA cryptographic coprocessor lower

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  • Montgomery analog multiplication algorithm for VLSI and VLSI structure of intelligent card analog multiplier
  • Montgomery analog multiplication algorithm for VLSI and VLSI structure of intelligent card analog multiplier
  • Montgomery analog multiplication algorithm for VLSI and VLSI structure of intelligent card analog multiplier

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Embodiment Construction

[0079] please see figure 2 . It is an example of the modified FIPS method for s=3. It is divided into A, B, C three parts. A corresponds to figure 2 The calculation on the right side of the dot-dash line is to calculate the low-order s words of the product result; B corresponds to the calculation on the left side of the dot-dash line, and the high-order s words of the product result. In order to save storage space, the storage space of the high-order s words is borrowed from the storage variable m, and finally the Montgomery product is stored in (m[s-1]m[s-2]...m[1]m[0]). Since the Montgomery product can only be guaranteed to be in the range of [0, 2N), it should also be adjusted to the range of [0, N). C just completes this adjustment function.

[0080] The computational bottleneck of the above algorithm is the number of multiplications. A needs to perform s 2 +2s multiplications, B needs to perform s 2 -s times of multiplication, a total of 2s 2 +s multiplications...

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Abstract

The present invention relates to the encryption and decryption technology and features that it is one algorithm with high degree of parallelism and suitable for VLSI implementation. The thrice large number multiplications of primary montgomery analog multiplication are decomposed into 2ss+s times small number multiplications. The VLSI structur for the intelligent card analog multiplifier is one high-order analog multiplier, which has 32 bit multiplier to complete 1024 bit analog multiplication and three stage parallel flow water structure in the data passage. Compared with available structure, the present invention has reduced chip area and analog multiplication clock number and can realize digital signature and confirmation of RSM algorithm in intelligent card.

Description

technical field [0001] The montgomery modular multiplication algorithm for VLSI and the smart card modular multiplier VLSI structure can be used in the technical field of smart card encryption / decryption Background technique [0002] 1 public key encryption technology [0003] In 1976, M.E.Hellman, W.Diffe and R.Merkle of Stanford University proposed a "public cryptographic key system", also known as an asymmetric cryptosystem, or a double-key cryptosystem. In this cryptosystem, the encryption and decryption capabilities of an encryption system are separated. Encryption and decryption are performed using two different keys, and it is not feasible to derive one key from the other. Each user using an asymmetric cryptographic system has a pair of selected keys, one of which is public and becomes the public key. The other is kept secret by the user himself. called a key. The public key cryptosystem has the following advantages: (1) The key distribution is simple. Since the...

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): G06F7/552H04L9/28
Inventor 李树国周润德孙义和
Owner TSINGHUA UNIV
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