Semiconductor structure and producing method thereof
A manufacturing method and semiconductor technology, applied in the fields of semiconductor/solid-state device manufacturing, semiconductor devices, semiconductor/solid-state device components, etc., can solve problems such as uneven barrier layers, inability of barrier layers to effectively provide barrier diffusion, and surface roughness.
Active Publication Date: 2006-05-17
TAIWAN SEMICON MFG CO LTD
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Problems solved by technology
The damaged sidewall of the opening in the porous low-k material layer may increase the number of pores and make the surface rougher, resulting in an uneven barrier layer formed on the sidewall of the opening, which is likely to cause electrical conductivity. Diffusion of material into porous low-k materials
In the above cases, the uneven barrier layer may not be effective in providing a diffusion barrier
This diffusion phenomenon may lead to component failure and other reliability issues when the design size is reduced
Method used
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[0027] In order to make the above-mentioned purposes, features and advantages of the present invention more obvious and easy to understand, the preferred embodiments are specifically cited below, and in conjunction with the attached drawings, the detailed description is as follows
[0028] Please refer to Figure 1a Firstly, a substrate is provided, on which there is a conductive layer 110, an etch stop layer 112, and an inter-metal dielectric layer 114 (inter-metal dielectric; IMD). Although not shown in the figure, circuits and other similar structures are also included in the substrate 100 . For example, structures such as transistors, capacitors, resistors, and interconnections may be formed on the substrate 100 . In one embodiment, the conductive layer 110 is a metal layer that can be in contact with circuit elements or other metal layers.
[0029] The conductive layer 110 can be made of any conductive material. In an embodiment of the present invention, when the condu...
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Abstract
The invention provides a semiconductor structure and a manufacturing method thereof. The manufacturing method of the semiconductor structure includes: partially or completely sealing the holes exposed on the dielectric material along the sidewall of the via window. Afterwards, one or more barrier layers are formed on the dielectric material, and the conductive material is filled in the via hole. The barrier layer formed on the sealing layer has a relatively smooth and continuous surface. The holes can be partially or completely sealed using, for example, a plasma process in an argon atmosphere.
Description
technical field [0001] The present invention relates to a semiconductor device, and more particularly to a semiconductor structure having a barrier layer in a damascene opening, and a method of forming the structure in an integrated circuit. Background technique [0002] Complementary Metal Oxide Semiconductor Transistor (CMOS) is a semiconductor technology that is mainly used today to manufacture Ultra Large Scale Integration (ULSI). Over the decades, the shrinking of semiconductor structures has resulted in dramatic improvements in device speed, performance, circuit density, and cost per unit of semiconductor wafer. However, the main challenge comes from whether the size of CMOS devices can be continuously reduced. [0003] Fabrication of interconnects is one of the challenges of this type. A typical CMOS device is formed by forming semiconductor structures such as transistors, capacitors, resistors, etc. on a substrate. Metal or metal alloys are used to form a single-l...
Claims
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IPC IPC(8): H01L21/768H01L21/31H01L21/3205H01L23/52
CPCH01L21/76814H01L21/76826H01L21/76831
Inventor 林俊成眭晓林
Owner TAIWAN SEMICON MFG CO LTD