Causality-based memory access ordering in a multiprocessing environment

A processor and causal technology, applied in memory systems, electrical digital data processing, instruments, etc., can solve problems such as increased memory sorting costs

Inactive Publication Date: 2007-03-07
INTEL CORP
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

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Problems solved by technology

[0010] Furthermore, memory ordering costs continue to increase substantially as systems imp

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  • Causality-based memory access ordering in a multiprocessing environment
  • Causality-based memory access ordering in a multiprocessing environment
  • Causality-based memory access ordering in a multiprocessing environment

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Embodiment Construction

[0021] The following description provides causality-based memory ordering in a multiprocessing environment. In the following description, numerous specific details are set forth, such as system arrangement and hierarchy, types of bus agents, and logic partitioning / integration options, to provide a thorough understanding of the present invention. However, one skilled in the art will recognize that the present invention may be practiced without these specific details. In other instances, control structures and gate level circuits have not been shown in detail in order not to obscure the invention. One of ordinary skill in the art, with the included description, will be able to implement the necessary logic circuits without undue experimentation.

[0022] The disclosed memory ordering techniques may advantageously improve overall processing throughput in some systems. Improved throughput can be achieved by relaxing traditional memory ordering rules in a manner that allows the s...

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Abstract

Causality-based memory ordering in a multiprocessing environment. A disclosed embodiment includes a plurality of processors and arbitration logic coupled to the plurality of processors. The processors and arbitration logic maintain processor consistency yet allow stores generated in a first order by any two or more of the processors to be observed in a different order by at least one other of the other processors.

Description

[0001] This application is a divisional application of the patent application whose application number is 00819240.5. technical field [0002] The present disclosure relates to the field of processing systems, and more particularly, the present disclosure relates to memory ordering techniques for multiprocessing systems. Background technique [0003] Improving the performance of a computer or other processing system generally improves overall throughput and / or provides a better user experience. One technique for improving the total amount of instructions processed in a system is to increase the number of processors in the system. However, implementing a multiprocessing (MP) system often requires more than parallel interconnected processors. For example, tasks or programs need to be partitioned so that they can be executed across parallel processing resources. [0004] Another major difficulty in MP systems is maintaining memory coherency (also known as coherency). Memory ...

Claims

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Application Information

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IPC IPC(8): G06F12/08
CPCG06F12/0815
Inventor D·T·马尔
Owner INTEL CORP
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