Static protection system using the floating and/or deflected multi-crystal silicon area and its method

Abstract

This invention discloses one static discharge protection system and method, wherein, the system comprises multiple transistor tubes composed of multiple grating areas, source electrode areas and leakage electrode areas in the source area center of underlay near isolation area in the underlay; the system comprises multi-silicon area isolated from dielectric layer and underlay; the multi-silicon area partly is in source area.

Description

technical field [0001] The present invention relates to integrated circuits. More specifically, the present invention provides a system and method for electrostatic discharge (ESD) protection using floating and / or biased polysilicon regions. As an example, the invention has been applied to input / output (I / O) devices. However, it should be recognized that the invention has a much broader range of applicability. Background technique [0002] Integrated circuits, or "ICs," have grown from a handful of interconnected devices fabricated on a single silicon wafer to millions of devices. Current ICs offer performance and complexity far beyond what was originally envisioned. In order to achieve progress in complexity and circuit density (i.e., the number of devices that can be packaged on a given chip area), the minimum device feature size (also known as device "geometry") accompanies the development of each generation of integrated circuits and become smaller. The feature size...

AI Technical Summary

Problems solved by technology

Effective protection usually requires lowering the breakdown voltage of the I / O transistors, but reducing the breakdown voltage can be difficult

Traditionally, ESD implantation has been used to adjust the breakdown voltage, but ESD implantation usually adds manufacturing complexity, which makes the effectiveness limited

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