Scheduling application instances to configurable processing cores based on application requirements and resource specification

Abstract

Systems and methods provide a processing task load and type adaptive manycore processor architecture, enabling flexible and efficient information processing. The architecture enables executing time variable sets of information processing tasks of differing types on their assigned processing cores of matching types. This involves: for successive core allocation periods (CAPs), selecting specific processing tasks for execution on the cores of the manycore processor for a next CAP based at least in part on core capacity demand expressions associated with the processing tasks hosted on the processor, assigning the selected tasks for execution at cores of the processor for the next CAP so as to maximize the number of processor cores whose assigned tasks for the present and next CAP are associated with same core type, and reconfiguring the cores so that a type of each core in said array matches a type of its assigned task on the next CAP.

Description

CROSS-REFERENCE TO RELATED APPLICATIONS[0001]This application claims the benefit of the following applications, each of which is incorporated by reference in its entirety:[1] U.S. Provisional Application No. 61 / 587,634, filed Jan. 17, 2012;[2] U.S. Provisional Application No. 61 / 721,686, filed Nov. 2, 2012; and[3] U.S. Utility application Ser. No. 13 / 684,473, filed Nov. 23, 2012.[0002]This application is also related to the following, each of which is incorporated by reference in its entirety:[4] U.S. Utility application Ser. No. 13 / 184,028, filed Jul. 15, 2011;[5] U.S. Utility application Ser. No. 13 / 270,194, filed Oct. 10, 2011;[6] U.S. Utility application Ser. No. 13 / 277,739, filed Nov. 21, 2011; and[7] U.S. Utility application Ser. No. 13 / 297,455, filed Nov. 16, 2011.BACKGROUND[0003]1. Technical Field[0004]This invention pertains to the field of information processing, particularly to the field of techniques for improving information processing efficiency and performance through...

AI Technical Summary

Benefits of technology

The invention is a system and method for a processor that can adapt its processing tasks based on their difficulty and the type of processor used. This allows for high-performance and cost-efficient processing of information. The processor can execute tasks by simply reconfiguring its hardware to perform the desired processing function, eliminating the need for software involvement.

Problems solved by technology

Consequently, for any given data processing job, processing hardware made of generic processors will likely be less efficient than processing hardware made of specialized processors designed for the demands of the given job.

However, it will be quite infeasible to predict ahead of time, e.g. when a given instance of processing (having a hardware with a processor core or array of them) is deployed for service, to know what would be the optimal type of core for any given processor instance, or the optimal breakdown of core types for a given array of processors—even on average over the lifetime of such processor(s), or, more relevantly as well as challengingly still, at any given instance of time while such processors are in service.

This leads to low overall data processing efficiency, e.g., in forms of executing tasks on core types that are worse suited for a given task than another type of core would be, or poor processing capacity utilization due to mismatches between the types of active tasks (in terms of the cores best suited for a given set of active jobs) and the types of their execution cores.

Consequences of such conventional techniques include suboptimal performance (e.g. in terms of time and / or energy taken to process given jobs) and low cost-efficiency (volume of program processing on-time throughput per unit cost) of application processing.

These related art publications however do not enable adapting the types of processing resources in a given resource pool according to the processing load and type demand variations presented by a group of applications configured to dynamically share the given pool of processing resources.

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