Scheduling application instances to configurable processing cores based on application requirements and resource specification

a processing core and resource specification technology, applied in the field of information processing, can solve the problems of low overall data processing efficiency, inability to predict ahead, and inability to process generic processor hardware, and achieve the effect of flexible, high-performance and cost-efficient information processing

Active Publication Date: 2014-06-19
THROUGHPUTER
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Benefits of technology

[0021]The invented systems and methods provide a processing task load and type adaptive manycore processor architecture, enabling flexible, high-performance and cost-efficient information processing. In embodiments of the invention, the processing tasks or processing applications as discussed herein refer to segments or instances of executable programs for the processing cores of the system, and such an application or task may, at its execution layer, comprise, in certain scenarios even exclusively, a file that reconfigures a core slot within a manycore processor according to an embodiment of invention into a hardware logic design that performs a desired information processing function of its associated piece of software program, e.g. processing of its input data to produce requested results such as output data, without a need for runtime software involvement such as executable program instructions that would be needed by a conventional processor core.

Problems solved by technology

Consequently, for any given data processing job, processing hardware made of generic processors will likely be less efficient than processing hardware made of specialized processors designed for the demands of the given job.
However, it will be quite infeasible to predict ahead of time, e.g. when a given instance of processing (having a hardware with a processor core or array of them) is deployed for service, to know what would be the optimal type of core for any given processor instance, or the optimal breakdown of core types for a given array of processors—even on average over the lifetime of such processor(s), or, more relevantly as well as challengingly still, at any given instance of time while such processors are in service.
This leads to low overall data processing efficiency, e.g., in forms of executing tasks on core types that are worse suited for a given task than another type of core would be, or poor processing capacity utilization due to mismatches between the types of active tasks (in terms of the cores best suited for a given set of active jobs) and the types of their execution cores.
Consequences of such conventional techniques include suboptimal performance (e.g. in terms of time and / or energy taken to process given jobs) and low cost-efficiency (volume of program processing on-time throughput per unit cost) of application processing.
These related art publications however do not enable adapting the types of processing resources in a given resource pool according to the processing load and type demand variations presented by a group of applications configured to dynamically share the given pool of processing resources.

Method used

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  • Scheduling application instances to configurable processing cores based on application requirements and resource specification
  • Scheduling application instances to configurable processing cores based on application requirements and resource specification
  • Scheduling application instances to configurable processing cores based on application requirements and resource specification

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Embodiment Construction

[0030]FIGS. and related descriptions below provide specifications for embodiments and aspects of an application program task load and type adaptive manycore processor, supporting execution of multiple concurrent application programs and their tasks and instances thereof on execution cores of matching types.

[0031]The references [1]-[3] provide a multistage manycore processing architecture, where from the set of pipelined and / or parallelized application programs sharing such a multistage parallel processing system, typically one task per each of the applications is located at each of the processing stages. Where the application type adaptive manycore processor systems per this specification is used in such multistage architectures, per each given processing stage, typically thus just one processor core type is needed per each of the applications sharing the given processing system. Accordingly, in such embodiments of system 100 (FIG. 1), the application ID# assigned for processing by ...

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Abstract

Systems and methods provide a processing task load and type adaptive manycore processor architecture, enabling flexible and efficient information processing. The architecture enables executing time variable sets of information processing tasks of differing types on their assigned processing cores of matching types. This involves: for successive core allocation periods (CAPs), selecting specific processing tasks for execution on the cores of the manycore processor for a next CAP based at least in part on core capacity demand expressions associated with the processing tasks hosted on the processor, assigning the selected tasks for execution at cores of the processor for the next CAP so as to maximize the number of processor cores whose assigned tasks for the present and next CAP are associated with same core type, and reconfiguring the cores so that a type of each core in said array matches a type of its assigned task on the next CAP.

Description

CROSS-REFERENCE TO RELATED APPLICATIONS[0001]This application claims the benefit of the following applications, each of which is incorporated by reference in its entirety:[1] U.S. Provisional Application No. 61 / 587,634, filed Jan. 17, 2012;[2] U.S. Provisional Application No. 61 / 721,686, filed Nov. 2, 2012; and[3] U.S. Utility application Ser. No. 13 / 684,473, filed Nov. 23, 2012.[0002]This application is also related to the following, each of which is incorporated by reference in its entirety:[4] U.S. Utility application Ser. No. 13 / 184,028, filed Jul. 15, 2011;[5] U.S. Utility application Ser. No. 13 / 270,194, filed Oct. 10, 2011;[6] U.S. Utility application Ser. No. 13 / 277,739, filed Nov. 21, 2011; and[7] U.S. Utility application Ser. No. 13 / 297,455, filed Nov. 16, 2011.BACKGROUND[0003]1. Technical Field[0004]This invention pertains to the field of information processing, particularly to the field of techniques for improving information processing efficiency and performance through...

Claims

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Application Information

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Patent Type & Authority Applications(United States)
IPC IPC(8): G06F15/80
CPCG06F15/80G06F9/5027G06F15/17381G06F15/7867G06F2209/5021G06F2209/483G06F2209/501G06F9/4881G06F9/44G06F9/5044
Inventor SANDSTROM, MARK HENRIK
Owner THROUGHPUTER
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