Fin cutting process for manufacturing finfet semiconductor devices

Abstract

One illustrative method disclosed herein includes, among other things, forming an original fin-formation etch mask comprised of a plurality of original line-type features and removing at least a portion of at least one of the plurality of original line-type features so as to thereby define a modified fin-formation etch mask comprising the remaining portions of the plurality of original line-type features. The method also includes forming a conformal layer of material on the remaining portions of the plurality of original line-type features of the modified fin-formation etch mask and performing at least one etching process to remove at least portions of the conformal layer of material and to define a plurality of fin-formation trenches so as to thereby initially define a plurality of fins in the substrate.

Description

BACKGROUND OF THE INVENTION[0001]1. Field of the Invention[0002]Generally, the present disclosure relates to the manufacturing of semiconductor devices, and, more specifically, to a novel fin cutting process for manufacturing FinFET semiconductor devices.[0003]2. Description of the Related Art[0004]In modern integrated circuits, such as microprocessors, storage devices and the like, a very large number of circuit elements, especially transistors, are provided on a restricted chip area. Transistors come in a variety of shapes and forms, e.g., planar transistors, FinFET transistors, nanowire devices, etc. The transistors are typically either NMOS (NFET) or PMOS (PFET) type devices wherein the “N” and “P” designation is based upon the type of dopants used to create the source / drain regions of the devices. So-called CMOS (Complementary Metal Oxide Semiconductor) technology or products refers to integrated circuit products that are manufactured using both NMOS and PMOS transistor devices...

AI Technical Summary

Benefits of technology

This patent is about a new process for making semiconductor devices. It involves making a mask with original line-type features and then removing some of those features to create a new mask with the remaining features. This new mask is used to create fin-formation trenches, which then become the initial shape of the semiconductor device's fins. The process can also involve adding material to the sides of the original features to create new features with a greater width and exposing parts of the substrate to be etched. Overall, this process allows for more precise and accurate formation of the semiconductor device's fins.

Problems solved by technology

Accordingly, accurately defining these relatively small fin structures 14 while accounting for their subsequent reduction in size in post fin-formation processes can be challenging.

However, when manufacturing FinFET devices, spaces for isolation structures must be provided between FinFET devices on the final integrated circuit product.

Unfortunately, accurately and reliably forming the opening 40A to its target width 40X and / or locating the edges 40X of the opening 40A this precisely is very difficult to accomplish in practice.

If the mask opening 40A is not properly sized and / or located, problems can result, as described more fully below.

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