Device, system, and method to verify data programming of a multi-level cell memory based on one of temperature, pressure, wear condition or relative position of the memory cell

Abstract

Techniques and mechanisms for verifying the programming of a multi-bit cell of a memory array. In an embodiment, program verification is performed based on a signal, other than a word line voltage, which includes an indication of a reference voltage that is to be a basis for evaluating a currently programmed threshold voltage of a memory cell. A determination that the particular indication is to be communicated with the signal is made based on a detected state of the memory device which includes the memory cell. In another embodiment, the detected state includes one of a thermal condition at the memory array, a pressure condition at the memory array, a wear condition of the memory array, or a relative position of the cell with respect to one or more other cells of the memory array.

Description

BACKGROUND1. Technical Field[0001]The present disclosure relates generally to memory devices and, more particularly, but not exclusively, to controller circuitry which is to verify a programming of a multi-level cell memory.2. Background Art[0002]Nonvolatile memory devices are capable of persisting data for extended periods of time without needing to be powered to maintain such data storage. Information is written to a flash memory device by changing the electrical characteristics of transistor-based memory cells to change how such memory cells react to applied voltages. The electrical characteristics of different memory cells in a flash memory device are representative of binary bits that can be read by sensing output voltages of the memory cells in response to applied input voltages.[0003]When programming nonvolatile memory devices, verification techniques are often used to ensure that information has been correctly programmed. For example, verification techniques can be used to r...

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