7 results about "Voltage down converter" patented technology

The invention provides a buck converter and an operation method thereof. The buck converter includes a power stage, a feedback network, a control loop, a logic circuit, a driver circuit, and a bypass detector. The power stage comprises an input end and an output end. The feedback network is coupled to the power stage for generating a feedback voltage according to the output voltage. The control loop comprises an error amplifier and a comparator. The error amplifier is used for generating an error voltage by comparing a reference voltage with a feedback voltage, and the comparator is coupled to the error amplifier and is used for generating a comparator signal according to the error voltage. The logic circuit is used for generating a logic control signal according to a group of control signals to realize a control scheme. The driving circuit is used for driving the power stage according to the logic control signal. The bypass detector is used for comparing the input voltage with a preset threshold value and correspondingly generating a bypass mode signal.

An apparatus is disclosed that includes a PWM ramp generator coupled between a switch node of a power converter and a first input of a comparator. The PWM ramp generator includes a first resistor and a first capacitor connected in series between the switch node and the first input of the comparator, and a second resistor and a second capacitor connected in parallel between the first input of the comparator and a feedback node. A PFM control circuit includes an error amplifier and a current zero-crossing detection comparator, where the error amplifier is coupled between a second input of the comparator and a reference node. The PFM control circuit is configured to generate a gate drive signal for the power converter when the power converter is configured to operate in a PFM mode.

The invention discloses a redundant power supply loop of an electronic mechanical braking system, belongs to the technical field of vehicle braking, and aims to realize redundant power supply and ensure the reliability of the electronic mechanical braking system. According to the technical scheme, the system comprises a vehicle power battery, at least two voltage reduction converters and a main control unit, and the at least two voltage reduction converters are connected in parallel and electrically connected with the vehicle power battery; the at least two main control units are connected in parallel, each step-down converter is electrically connected with the at least two main control units, each main control unit comprises a voltage stabilizer, an energy storage module and a microcontroller, and the voltage stabilizer enables electricity from the step-down converter to be output in a stable voltage mode so as to supply power to the microcontroller and the energy storage module. Each main control unit is electrically connected with the brake pedal, the parking switch and the wheel speed sensor, and the energy storage module of each main control unit supplies power to the wheel end brake assembly on at least one axle.

The application belongs to the technical field of power management circuit, and particularly relates to a three-level buck-boost converter adopting V 2 COT control. The three-level buck-boost converter comprises: a power stage module, which is used for converting an input voltage into a stable output voltage by controlling the conduction and turn-off of a power switch tube according to a driving signal output by a digital control module; an analog control module, which is used for generating a first control signal according to the difference between the output voltage and a reference voltage, and comparing the first control signal with a feedback output voltage after being superimposed with a ramp signal to generate a second control signal input to the digital control module; and the digital control module, which is used for determining that the system works in a Buck mode, a Boost mode or a detection mode according to the second control signal and a mode selection signal generated by a finite state machine. The application realizes fast transient response and good stability, and simultaneously considers the smoothness of multi-mode switching and the voltage balance of a flying capacitor.

Provided is a controller circuit of a buck DC / DC converter. The controller circuit includes a feedback pin to be connected to an output line of the buck DC / DC converter, a voltage divider circuit including a first resistor and a second resistor connected in series between the feedback pin and a ground, a feedback circuit that generates a pulse modulation signal to bring a feedback voltage as an output of the voltage divider circuit close to a reference voltage, and a current source that is connected to the feedback pin and supplies a constant current.

The invention belongs to the technical field of power management circuits, and particularly relates to a three-level buck-boost converter controlled by V2COT. Comprising a power level module used for controlling on and off of a power switch tube according to a driving signal output by a digital control module so as to convert an input voltage into a stable output voltage; the analog control module is used for generating a first control signal according to the difference value between the output voltage and the reference voltage, and comparing the first control signal with the feedback output voltage after superposing the first control signal with the ramp signal so as to generate a second control signal input to the digital control module; the digital control module is used for determining that the system works in a Buck mode, a Boost mode or a detection mode according to the second control signal and a mode selection signal generated by a finite-state machine; according to the invention, fast transient response and good stability are realized, and the smoothness of multi-mode switching and the voltage balance of the flying capacitor are considered at the same time.

A voltage down converter includes a fast response circuit, a compensator coupled to an output, an interleaving logic circuit coupled to the compensator, a plurality of pulse width modulation signal generators, a plurality of OR gates coupled to corresponding pulse width modulation signal generators, a plurality of power stages coupled to corresponding OR gates, a plurality of inductors and an output capacitor. Each pulse width modulation signal generator is coupled to the interleaving logic circuit, the output and an input. The fast response circuit includes a voltage droop sensor coupled to the output, a load frequency sensor coupled to the output, a fast response signal generator coupled to the voltage droop sensor, a maximum fast response signal generator coupled to the voltage droop sensor and the load frequency sensor, and an AND gate coupled to the fast response signal generator, the maximum fast response signal generator and the plurality of OR gates.