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Packet processing engine

A packet processing engine and packet technology, applied in digital transmission systems, data exchange networks, electrical components, etc., can solve problems such as increased complexity of programming pipelined engines and limited packet processing capabilities

Inactive Publication Date: 2009-06-10
CISCO TECH INC
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

Additionally, the complexity of programming a pipelined engine increases rapidly with the number of processor stages
Moreover, the disparate packet processing functions spread across the stages of the pipeline architecture greatly limit the packet processing capability

Method used

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  • Packet processing engine
  • Packet processing engine
  • Packet processing engine

Examples

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Embodiment Construction

[0019] The present invention discloses methods and apparatus for processing packets in, for example, routers, packet switching systems, or other communication or computer components, devices or systems. The embodiments described herein include various elements and limitations, but no single element or limitation is considered a critical element or limitation. Each claim stands on its own as a separate statement of an aspect of the invention. Furthermore, some of the described embodiments may also include, but are not limited to, systems, networks, integrated circuit chips, embedded processors, ASICs, methods, and computer-readable media containing instructions. The embodiments described below embody various aspects and various configurations within the scope and spirit of the present invention in conjunction with the drawings illustrating exemplary rather than limiting configurations.

[0020] As used herein, the term "packet" refers to any type of packet or any other unit of...

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PUM

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Abstract

The present invention discloses various methods and apparatuses for processing packets, such as using a high performance massively parallel packet processing structure, distributing packets or subsets of packets to individual packet processors and collecting processed packets or Subsets of packets and forwards the resulting modified or processed packets, accesses packet processing resources across the shared resource network, uses direct memory access techniques to access packet processing resources, and / or stores packets in global packet memory while providing a second overlap portion to the packet processor. In one embodiment, packets of multiple packet streams are received. The subset of bytes of the packet is distributed to the next packet processor determined based on the distribution pattern. The subset of packets is processed to generate a modified subset, which in turn is collected based on the distribution pattern; and the modified packet including the modified subset is forwarded.

Description

technical field [0001] The present invention relates generally to communication and computer systems; more particularly, the present invention relates to packet processing, such as packet processing in routers, packet switching systems, or other communication or computer systems; more specifically, such processing may include Subsets distribute to individual packet processors and collect processed packets or subsets of packets and forward modified or otherwise processed packets as a result, as well as access a shared between multiple processing engines or multiple resources. Background technique [0002] The communications industry is changing rapidly to adapt to emerging technologies and ever-increasing customer demands. This customer demand for new applications as well as enhanced performance of existing applications is driving communication network and system providers to adopt networks and systems with higher speed and capacity (eg, wider bandwidth). A common approach ...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): H04L12/56H04L45/58H04L49/111
CPCH04L49/103H04L29/0653H04L45/58H04L69/22H04L45/00H04L49/3072H04L45/60
Inventor 维塔利·苏孔尼科迈克尔·拉奥尔迈克尔·B·加勒摩西·沃洛申威廉·N·伊瑟顿拉米·泽曼施约翰·H·W·贝廷科
Owner CISCO TECH INC