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Parallel weighting bit upturn decoding method of low density check code

A technology of weighted bit flipping and low-density check code, which is applied in the decoding field of channel error correction coding, can solve problems such as slow decoding convergence, achieve the effect of reducing computational complexity and improving decoding convergence speed

Inactive Publication Date: 2007-08-15
SOUTHEAST UNIV
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AI Technical Summary

Problems solved by technology

Solve the shortcomings of the existing weighted bit flipping algorithms that can only flip one bit per iteration, so the convergence of decoding is slow; at the same time, the parallel flipping mechanism of this method makes it easier for hardware to design high-throughput iterative decoders

Method used

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  • Parallel weighting bit upturn decoding method of low density check code
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  • Parallel weighting bit upturn decoding method of low density check code

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Embodiment Construction

[0048] The parallel weighted bit-flip decoding method of the low-density parity check code of the present invention first performs hard judgment on the channel received information to obtain a hard judgment code word, and then checks whether the judgment sequence satisfies all the verification relations of the check nodes, and if so, decodes Stop; otherwise, for any invalid verification node, find out the variable node with the largest weighted flipping criterion among all the variable nodes participating in the verification, and send a unique flipping unit signal to the variable node; then, each variable node Accumulate the semaphore of the flipping unit, and select all variable nodes whose accumulated semaphore is greater than the given flipping threshold, perform parallel bit flipping on the corresponding position of the hard-judgment codeword, and update the hard-judgment codeword at the same time, and the algorithm enters the next iteration.

[0049] The specific steps are...

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Abstract

Compared with prior art, the parallel-WBF coding method for soft decision coding on LDPC improves convergence speed greatly, and comprises exactly: hard deciding received signal to obtain a hard-decision code and try to decide whether it satisfies all check relation, yes to end; or else, to any failure node, finding out the variable node with the largest WBF decision, and sending unique signal to this node; then, counting signal quantity, selecting all nodes whose signal quantity over a threshold, taking parallel WBF to the position of hard-code; updating the hard-code, going to next iteration.

Description

technical field [0001] The invention relates to an iterative decoding method of a low-density parity check code, which belongs to the technical field of decoding of channel error correction codes. Background technique [0002] In various communication systems, transmission bits are affected by channel random noise and generate random errors. It has been proved by theory and practice that the error-correcting coding method, which provides transmission reliability by introducing redundancy, is a kind of effective means. The Turbo codes and Low-Density Parity-Check (LDPC) codes introduced in recent years are one of the coding schemes with the strongest error correction capability found so far. [0003] Compared with Turbo codes, the design of LDPC codes is more flexible (different code rates / code lengths), and the fully parallel structure of the LDPC code decoding algorithm makes it easier to design high-throughput LDPC decoders. Therefore, the standardization of channel codi...

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Application Information

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IPC IPC(8): H03M13/11H03M13/00
Inventor 吴晓富赵春明尤肖虎
Owner SOUTHEAST UNIV
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