Frequency Search Method of Digitally Controlled Oscillator and Decoder Using the Method

Abstract

The present invention relates to a frequency search method for a digitally controlled oscillator and a decoder using the method. The method includes providing a plurality of available pre-control codes, each pre-control code includes a most significant bit, and corresponds to a selecting a frequency of a digitally controlled oscillator; selecting an available pre-control code based on its most significant bit; and providing said selected pre-control code to said digitally controlled oscillator. The digital phase locked loop using this method will not encounter the frequency search problem caused by the initial condition or the frequent switching in the sub-band when the digital phase locked loop enters the frequency lock state. Therefore, the digital phase locked loop does not need a correction circuit, And have better jitter performance (jitter performance).

Description

technical field [0001] The present invention relates to a digitally controlled oscillator, in particular to a frequency search method for a digitally controlled oscillator and a decoder using the method. Background technique [0002] With the advancement of deep sub-micron manufacturing processes, the demand for high-performance integrated circuits and their shortest time-to-market is increasing day by day. Scalable microprocessor and graphics processor systems can be more cost-effectively migrated to more advanced manufacturing processes. , to increase the clock rate, reduce power consumption, and reduce design time, but the synchronization between integrated circuit modules is also becoming more and more important. Therefore, considerable effort has been focused on high-performance digital interfaces that act as communication bridges in these digital systems circuit, the digital phase-locked loop can be applied to different manufacturing processes. Furthermore, due to the ...

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Problems solved by technology

[0004] Figure 2A It is a corresponding relationship diagram between the output code and the period (reciprocal of time) of the low-pass filter of a traditional digital phase-locked loop with a digitally controlled oscillator, Figure 2B is a control code versus period (reciprocal of time) graph for a conventional digitally controlled oscillator with non-overlapping subbands, however, for this digitally controlled loop, Figure 2A Each output code of the low-pass filter in corresponds to Figure 2B For the control codes of the digitally controlled oscillator within the Figure 2B , a conventional digital PLL with a digitally controlled oscillator with non-overlapping subbands would have a large frequency jump, or a frequency dead zone at the border of the subbands

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