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Accelerator, information processing apparatus and information processing method

An information processing device and accelerator technology, which is applied in the direction of data processing power supply, etc., can solve the problems of CPU overload, without considering multiple computing components of the accelerator, etc.

Inactive Publication Date: 2014-06-25
KK TOSHIBA
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0005] However, in the case of the information processing device proposed above, it is the CPU on the main body side that decides the driving voltage of the accelerator, etc., so the CPU must execute the decision processing, and the CPU will be overloaded.
[0006] In addition, the information processing device proposed above does not take into account the fact that there are multiple computing components inside the accelerator.

Method used

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  • Accelerator, information processing apparatus and information processing method
  • Accelerator, information processing apparatus and information processing method
  • Accelerator, information processing apparatus and information processing method

Examples

Experimental program
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Embodiment 1

[0022] First, according to figure 1 , the configuration of the information processing device according to Embodiment 1 of the present invention will be described. figure 1 is a configuration diagram showing the configuration of the information processing device of this embodiment.

[0023] The information processing device 1 is configured to include a PC 2 having a PC design structure (architecture). PC2 can attach, ie connect to accelerator 3 . The PC 2 is an information processing device configured to include a CPU (Central Processing Unit) 11, an MCH (Memory Controller Hub) 12, an ICH (I / O Controller Hub) 13, a GPU (Graphics Processing Unit) 14, a main memory 15, as VRAM (VideoRAM) 16 for video memory. Therefore, the accelerator 3 is connected to the PC 2 having such a PC structure to constitute the information processing device 1 . In addition, in this embodiment, an example of a PC structure composed of CPU 11 , MCH 12 , ICH 13 , and GPU 14 was shown as the PC structu...

Embodiment 2

[0091] Next, Embodiment 2 of the present invention will be described. The AC for the information processing device of Embodiment 2 not only has a plurality of general-purpose processing elements (PE), but also has a plurality of hardware macros (hard macros). For the actions of the plurality of hardware macros, the allocation of processing is also determined, and the control is as follows: Optimal power consumption execution processing.

[0092] Figure 9 It is a block diagram showing the configuration of AC3A of the second embodiment. The same reference numerals are assigned to the same constituent elements as AC3 in Embodiment 1, and explanations thereof are omitted.

[0093] like Figure 9 As shown, AC3A has multiple (here, two) encoders 26A, 26B and multiple (here, two) decoders 26C, 26D as hardware macros, and is connected to CPE 21 via internal bus 25 . Hereinafter, when all of the encoders 26A, 26B, and decoders 26C, 26D are indicated, or when one of them is indicated...

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Abstract

The invention relates to an accelerator, an information-processing device and an information processing method. The accelerator can be connected with a PC to execute a program. The accelerator includes a plurality of calculation units, each calculation unit operable to execute the program in parallel, a F / V control unit configured to control the operation capability or processing capability of at least one of the plurality of calculation units, and an operation unit configured to determine the corresponding operation capability or processing capability for the plurality of calculation units based on load information on the program to be executed and to control the operation control unit accordingly.

Description

technical field [0001] The present invention relates to an accelerator, an information processing device, and an information processing method, and in particular, to an accelerator capable of being connected to the information processing device and having a plurality of computing components capable of executing programs through parallel processing, an information processing device and an information processing method connected to the accelerator. Background technique [0002] Conventionally, a technique is known in which a device having a calculation function is added to an information processing device and the added device shares part of the executed processing. For example, there is a technique in which a device having a computing function called an accelerator is installed in a personal computer (hereinafter referred to as PC) as an information processing device, and the central processing unit (hereinafter referred to as CPU) of the PC body distributes The processing of ...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): G06F1/32
Inventor 安川英树
Owner KK TOSHIBA