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Narrow semiconductor trench structure

A semiconductor, trench technology, applied in semiconductor devices and other directions, can solve problems such as hindering the reduction of process size, power density and/or voltage requirements

Inactive Publication Date: 2008-06-18
维税-希力康克斯公司
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

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Problems solved by technology

However, conventional methods of fabricating trenches in semiconductors, such as those commonly used in power semiconductors and memory semiconductors such as dynamic random access memories, face the challenge of fabricating trenches that are narrower than previously The trench corresponds to the reduction of the critical dimension of the semiconductor process
Additionally, some semiconductor applications have power density and / or voltage requirements that prevent process scaling

Method used

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  • Narrow semiconductor trench structure
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Embodiment Construction

[0012] Reference will now be made in detail to various embodiments of the invention, examples of which are illustrated in the accompanying drawings. While the invention is described with reference to these embodiments, it will be understood that it is not intended to limit the invention to these embodiments. On the contrary, the invention is intended to cover various alternatives, modifications and equivalents, which may be included within the spirit and scope of the invention as defined by the appended claims. Furthermore, in the following detailed description of the invention, numerous specific details are set forth in order to provide a thorough understanding of the invention. However, it will be understood by those skilled in the art that the present invention may be practiced without these specific details. In other instances, well-known methods, procedures, components, and circuits have not been described in detail where they would not unnecessarily obscure aspects of t...

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Abstract

Systems and methods for narrow semiconductor trench structures. In a first method embodiment, a method for forming a narrow trench comprises forming a first layer of insulating material on a substrate and creating a trench through the first layer of insulating material and into the substrate. A second insulating material is formed on the first layer and on exposed portions of the trench and the second insulating material is removed from the first layer of insulating material and the bottom of the trench. The trench is filled with an epitaxial material and the first layer of insulating material is removed. A narrow trench is formed by the removal of remaining portions of the second insulating material.

Description

[0001] related application [0002] This application claims priority to US Provisional Patent Application 60 / 661,198, Attorney Docket No. VISH-8735.PRO, filed March 11, 2005 by Chau et al., the entire contents of which are incorporated herein by reference. technical field [0003] Embodiments of the present invention relate to the field of semiconductor fabrication, and more particularly to systems and methods for forming narrow trench structures in semiconductors. Background technique [0004] The continual reduction in the feature size of modern semiconductor devices, such as the critical dimension, has increased the semiconductor density in many types of semiconductor devices. However, conventional methods of fabricating trenches in semiconductors, such as those commonly used in power semiconductors and memory semiconductors such as dynamic random access memories, face the challenge of fabricating trenches that are narrower than previously The trenches correspond to the ...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): H01L21/28
Inventor 瑟－图・绍霍安・勒阔－英・陈
Owner 维税-希力康克斯公司