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Method and system for isolating I/O adapter unit

A technology of adapters and unit phases, which is applied in the direction of instruments, various digital computer combinations, electrical digital data processing, etc.

Active Publication Date: 2008-07-16
IBM CORP
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

There is no mechanism to check the address provided by the OS to the IOA

Method used

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  • Method and system for isolating I/O adapter unit
  • Method and system for isolating I/O adapter unit
  • Method and system for isolating I/O adapter unit

Examples

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Embodiment Construction

[0022] Referring now to the drawings, Figure 1 depicts a block diagram of a data processing system in which the present invention may be implemented. Data processing system 100 may be a symmetric multiprocessor (SMP) system including a plurality of processors 101 , 102 , 103 , and 104 coupled to system bus 106 . For example, data processing system 100 may be an IBM eServer, a product of International Business Machines Corporation of Armonk, NY, implemented as a server within a network. Alternatively, a single processor system may also be used. Also connected to system bus 106 is memory controller / cache 108, which provides an interface to a number of local memories 160-163. I / O bus bridge 110 connects to system bus 106 and provides an interface to I / O bus 112 . Optionally, memory controller / cache 108 and I / O bus bridge 110 may be integrated.

[0023] Data processing system 100 is a logically partitioned data processing system, however, it should be understood that the presen...

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PUM

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Abstract

The invention discloses a data processing system and a method for isolating multiple I / O adapters in the system. The data processing system also includes a set of processors that communicate with the I / O adapters using the PCIe protocol. Each I / O adapter has its own ID. In a preferred embodiment, the command issued by the I / O adapter includes a PCIe defined (PCIe defined) requester ID field, and the requester ID field includes one or more I / O adapter requester IDs. The Requestor ID can be used as input to the CAM, which provides an index into the TVT to identify a unique and independent system memory space for the I / O adapter.

Description

technical field [0001] The present invention relates generally to isolating input / output adapter addressing domains in data processing systems. More particularly, the present invention relates to isolating input / output adapter addressing domains in logically partitioned data processing systems implementing HyperTransport. The term "isolation" as used herein refers to verifying that an I / O adapter actually owns or has access to the particular system storage location it requests access to. Therefore, if the I / O adapter is properly isolated to a pre-allocated memory space, it will only request access to that memory region. Background technique [0002] In a logically partitioned data processing system, multiple operating systems or multiple copies of the same operating system run on a single data processing system platform. Each operating system or copy of an operating system executing within a data processing system is assigned to a different logical partition ("LPAR"), and ...

Claims

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Application Information

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IPC IPC(8): G06F15/17
CPCG06F13/124
Inventor T·A·格雷格
Owner IBM CORP