Lateral DMOS device and method for fabricating the same
A conductive type, deep well technology, applied in semiconductor/solid-state device manufacturing, electric solid-state devices, semiconductor devices, etc., can solve the problems of increased on-resistance and unsuitability for improving the practicability of LDMOS devices
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[0017] Reference will now be made in detail to the preferred embodiments of the invention, examples of which are illustrated in the accompanying drawings. Wherever possible, the same reference numbers will be used throughout the drawings to refer to the same or like elements.
[0018] as example Figure 3A As shown in , according to an embodiment, a high-side LDMOS may include: a P-type semiconductor substrate 302 having an N-type buried layer 304 formed thereon and / or thereover; and a P-type epitaxial layer having a thickness of P- epi. The N-type buried layer 304 can be used to reduce the width of the depletion layer extending from the P-type body 310 , so that when a voltage is applied to the N+-type drain region 318 , the breakdown voltage can be substantially increased. The P-type epitaxial layer can be used to reduce the impedance of the substrate 302 .
[0019] N-type deep well 306 may then be formed on and / or over P-type semiconductor substrate 302 . When implement...
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