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NandFlash amortization management method

A buffer management and physical block technology, applied in the direction of memory address/allocation/relocation, etc., to achieve the effect of flexible reading and writing, improving access efficiency, and improving reading and writing efficiency

Inactive Publication Date: 2012-06-27
VIMICRO CORP
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0006] Although this operation reduces the operation of repeatedly erasing NandFlash blocks, if the system frequently accesses NandFlash and the access areas are distributed on different blocks, it is so simple The read and write methods cannot meet the requirements

Method used

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Embodiment Construction

[0059] In order to make the object, technical solution and advantages of the present invention more clearly, the present invention will be further described in detail below in conjunction with the accompanying drawings and specific embodiments.

[0060] The purpose of the present invention is to adopt multi-caching and linked list arrays to nest each other to improve read-write efficiency, and its steps include:

[0061] Step 1, establish a linked list array corresponding to the NandFlash physical block address one by one in the memory;

[0062] Described linked list array is a hash linked list array that comprises linked list index array, and it is one-to-one correspondence with NandFlash address and linked list array address by Hash Algorithm, when searching for linked list array, at first calculate the NandFlash physical block to be operated by Hash Algorithm The position in the linked list index array, according to the position in the linked list index array, specifically ...

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PUM

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Abstract

The invention relates to a NandFlash buffer management method. In the method, a plurality of buffers are adopted to improve the read-write efficiency, a linked list array is introduced and the doubly linked list nesting is adopted so as to improve the visit efficiency of a buffer unit, and the method used hardly and recently is adopted in the data linked list, thereby improving the visit efficiency of the data linked list.

Description

technical field [0001] The invention relates to a NandFlash buffer management method, in particular to a method for managing the NandFlash buffer by using a hash linked list array and a plurality of cache units in cooperation. Background technique [0002] As a commonly used non-volatile flash memory, NandFlash has been widely used in various digital products. The access speed of the system to NandFlash is an important factor that affects the performance of the entire product. The structure of NandFlash is based on blocks, each block contains fixed-size pages, and each page includes fixed-size bit values. [0003] There are two common methods for the system to access NandFlash: [0004] Direct access, that is, there is no system cache unit, and it directly drives NandFlash to read and write. Although this approach is simple and easy to implement, it has obvious disadvantages. Since NandFlash can only modify a bit from 1 to 0, even if a bit is modified, the entire block w...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): G06F12/08G06F12/02
Inventor 李栋梁艾国游明琦
Owner VIMICRO CORP