Digital programmable time delay apparatus based on dynamic current mirror
A technology of programming time and dynamic current, applied in the direction of electrical components, pulse processing, single output arrangement, etc., can solve the problems of large static and dynamic power consumption, no way to compare CSIDPDE, monotony, etc., and achieve improved work delay and predictability The effect of improving and saving energy
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[0022] The technical scheme that the present invention solves its technical problem is: the time delay unit based on the dynamic current mirror that the present invention proposes, such as Figure 3 Show. The DPDE of the present invention uses a switching current mirror to turn off the quiescent current, and separates the control voltages of the two output transistors, so as to avoid short-circuit current consumption when the output terminals PMOS and NMOS of the delay unit are turned on at the same time.
[0023] The working principle of DPDE is simple. When Din is low level, the unit is in the reset state, M2, M3 open Dout is 0 level. When Din goes high, M1 turns on M3, and the gate capacitance of M4 starts to discharge. The speed of discharge is controlled by the current I of Mn1 (Mn2). This current is the sum of the control currents through Msc. The control current is provided by Mp0 ~ Mp3.
[0024] The invention consists of a control part, a dynamic current mirror (a...
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