Phase change memory dynamic resistance test and manufacturing methods

Abstract

A method for testing an integrated circuit memory device includes applying a sequence of test pulses to a memory cell on the device, where the test pulses result in current through the memory cell having an amplitude dependent on the test pulse. Resistance in the memory cell is measured in response to the sequence of test pulses. A parameter set is extracted from the resistance measurements which includes at least one numerical coefficient that models dependency of the measured resistance on the amplitude of the current through the memory cell. The extracted numerical coefficient or coefficients are associated with the memory device, and used for controlling manufacturing operations.

Description

technical field [0001] The present invention relates to high density memory devices using phase change memory materials, such as chalcogenides and other materials, and methods of making such devices. Background technique [0002] These phase change memory materials, such as chalcogenides and similar materials, can be caused to change crystal phase by applying a current of magnitude suitable for use in integrated circuits. Generally speaking, the characteristic of the amorphous state is that its resistance is higher than that of the crystalline state, and this resistance value can be easily measured and used as an indicator. This property has sparked interest in using programmable resistive materials to form non-volatile memory circuits that can be used for random access reading and writing. [0003] The transition from the amorphous state to the crystalline state is generally a low current step. The transition from the crystalline state to the amorphous state (hereinafter ...

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Problems solved by technology

Various implemented techniques hope to make this active area smaller, so that the current value that causes the phase change is reduced

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