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Phase locked loop and calibration method

A time-calibration, phase-locked loop technology, applied in the direction of automatic power control, electrical components, etc., can solve problems such as high cost and long-term cycle, and achieve the effect of reducing cost and fast calibration

Inactive Publication Date: 2010-03-31
MEDIATEK INC
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0005] In order to solve the problem that the calibration method of the traditional technology requires a relatively long period of time to complete the calibration process or requires a relatively high cost, one of the objectives of the present invention is to provide a method for a phase-locked loop and a calibration time constant

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  • Phase locked loop and calibration method

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Embodiment Construction

[0015] figure 1 A schematic block diagram showing a phase-locked loop according to an embodiment of the present invention. The phase-locked loop 100 includes: a phase detector 101 that receives a reference frequency signal Fref and a first frequency signal F1 to generate phase difference signals Up and Dn; a current pump 102 coupled to the phase detector 101 to convert the phase difference signal Up and Dn into a current signal ( figure 1 not marked); the loop filter 103 is coupled to the current pump 102 to filter the current signal to generate the control signal Vt; the voltage controlled oscillator (VCO) 104 responds to the control signal Vt to generate the output frequency signal Fvco; the frequency divider 105 Frequency division is performed on the output frequency signal Fvco to generate a first frequency signal F1. It should be noted that the loop filter 103 includes a voltage storage device (such as figure 2 As shown), the voltage storage device is coupled to the c...

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Abstract

A phase locked loop (PLL) directly uses a charge pump and loop filter therein for fast and low-costly calibration. The PLL comprises a charge pump, a loop filter, a voltage comparator, a counting device, and a calibration device. The loop filter comprises a voltage storage device coupled to the charge pump for charging by the charge pump, wherein the voltage storage device comprises a variable impedance. The voltage comparator is coupled to a voltage reference and to the voltage storage device for comparing a voltage of the storage device and a voltage of the voltage reference. The counting device is coupled to the voltage comparator to measure the charge time required for the voltage of the voltage storage device to substantially equal to the voltage of the voltage reference. The calibration device adjusts the variable impedance to adjust the time measured by the counting device to a desired time.

Description

technical field [0001] The present invention relates to time constant calibration, more specifically, to a phase locked loop (Phase locked loop, PLL) and a method for calibrating the time constant. Background technique [0002] A phase-locked loop is a common form of frequency synthesizer used to generate frequency signals used in electronic or communication systems. PLL is usually designed with a constant loop bandwidth to meet the needs of noise suppression and lock time. A loop filter in a PLL typically includes passive elements such as resistors and capacitors. The current pump of the PLL usually provides a reference current determined by a current source and a reference resistor. However, inherent variations in the system's resistance, capacitance, or other components can cause unacceptable variations in loop bandwidth and gain, which will degrade the PLL's noise immunity and phase lock time. [0003] In the conventional technology, there are many methods to adjust t...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): H03L7/18
CPCH03L7/093H03L7/0898
Inventor 柯凌维余岱原陈信宏林哲煜
Owner MEDIATEK INC