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Semiconductor memory device of single gate structure

A semiconductor and memory technology, applied in semiconductor devices, semiconductor/solid-state device manufacturing, static memory, etc., can solve problems such as difficulty in realizing single-gate semiconductor memory, unstable operation, and unreliability

Inactive Publication Date: 2010-06-30
DONGBU HITEK CO LTD
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

Therefore, it may be difficult to implement single-gate semiconductor memory, and its operation may be unstable or unreliable

Method used

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  • Semiconductor memory device of single gate structure
  • Semiconductor memory device of single gate structure
  • Semiconductor memory device of single gate structure

Examples

Experimental program
Comparison scheme
Effect test

Embodiment Construction

[0031] Hereinafter, a single-gate semiconductor memory according to an embodiment will be described in detail with reference to the accompanying drawings.

[0032] In the description of embodiments, it will be understood that when a layer (or film) is referred to as being "on" another layer or substrate, it can be directly on another layer or substrate, or it can also have intervening layers therein. . Also, when a layer is referred to as being "under" another layer, it can be directly under, and one or more intervening layers may also be present. In addition, it will also be understood that when a layer is referred to as being "between" two layers, it can be the only layer between the two layers, or one or more intervening layers may also be present.

[0033] figure 2 is a plan view showing the single-gate semiconductor memory according to the first embodiment, and image 3 is shown based on figure 2 Line A-A' is a cross-sectional view of the structure of the single-gat...

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PUM

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Abstract

A single gate semiconductor memory device includes a high-potential well on an upper portion of a semiconductor substrate; a first well on an upper portion of the high potential second conductive type well; a second well spaced apart from the first well on the upper portion of the high potential well and across the high-potential well; a floating gate on the first well and the second well; a first ion implantation region in the first well on one side of the floating gate; a second ion implantation region in the first well on an opposite side of the floating gate; a first complementary ion implantation region in the first well next to the second ion implantation region; a third ion implantation region in the second well on one side of the floating gate; and a second complementary ion implantation region in the second well on the opposite side of the floating gate.

Description

[0001] Cross References to Related Applications [0002] This application claims priority from Korean Patent Application No. 10-2008-0131552 filed on December 22, 2008, the entire contents of which are incorporated herein by reference. technical field [0003] Embodiments of the present invention relate to a semiconductor memory with a single gate structure. Background technique [0004] Generally, a semiconductor memory such as an Electrically Erasable Programmable Read Only Memory (EEPROM) has a multilayer structure of stacked floating gates, oxide-nitride-oxide (ONO) layers, and control gates. Recently, however, single-gate memory structures having relatively simple fabrication processes and excellent operating characteristics have been investigated. [0005] Figure 1a is a diagram showing applied voltages when programming a typical single-gate semiconductor memory. In the following description, the aforementioned semiconductor memory may be an EEPROM. [0006] The se...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): H01L27/115H01L29/78G11C16/34G11C16/14G11C16/26H10B69/00
CPCG11C2216/10H01L29/7883H01L27/11558H01L29/42324H01L29/0692H01L27/11521G11C16/10H10B41/30H10B41/60H01L21/265H01L21/823892
Inventor 郑真孝
Owner DONGBU HITEK CO LTD