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Reduction of leakage current in sequence circuit

A sequential circuit, leakage current technology, applied in the field of electronics, can solve the problems of memory consumption, high power, etc.

Inactive Publication Date: 2010-07-14
LSI CORPORATION
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

Although this approach is more efficient in reducing space consumption than using multiplexers, the memory consumes considerably higher power to hold and move MLBs to combinational logic circuits

Method used

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  • Reduction of leakage current in sequence circuit
  • Reduction of leakage current in sequence circuit
  • Reduction of leakage current in sequence circuit

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Embodiment Construction

[0018] Systems and devices for reducing leakage current in sequential circuits are disclosed herein. In the following detailed description of embodiments of the invention, reference is made to the accompanying drawings that form a part hereof, and in which are shown specific embodiments in which the invention may be practiced. These embodiments are described sufficiently to enable those skilled in the art to practice the invention, and it is to be understood that other embodiments may be practiced and changes may be made without departing from the scope of the invention. Therefore, the following detailed description is not intended to limit understanding, and the protection scope of the present invention can only be defined by the appended claims.

[0019] figure 1 An example sequential circuit 100 is shown with a system 150 for reducing leakage current in accordance with an embodiment. In particular, figure 1 The pipeline of the sequential circuit is shown. The sequential...

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PUM

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Abstract

Disclosed is a system and apparatus for reducing leakage current in sequence circuit. In an embodiment, a system for reducing leakage current in sequence circuit, includes a combinational logic circuit, one or a plurality of reset flip-flops connected to the combinational logic circuit, and one or a plurality of R-S flip flops connected to the combinational logic circuit. The system also includes a control module, which is connected to the reset flip-flops and the set flip-flops, and is configured to reset the reset flip-flop and set the R-S flip flop when the standby mode of the sequence circuit is triggered.

Description

technical field [0001] Embodiments of the present invention relate to the field of electronics. In particular, embodiments of the invention relate to power management of electronic devices and systems. Background technique [0002] Leakage current can be a very small amount of current that leaks from a device when it is off, due to the semiconducting nature of the device. For example, high leakage currents in deep submicron time periods are playing an increasing role in the power loss of complementary metal-oxide semiconductor (CMOS) circuits in devices due to the threshold voltages, Channel lengths and gate oxide thicknesses continue to decrease due to ongoing efforts to scale devices down. [0003] There are three main sources of leakage in a device, namely subthreshold leakage, gate leakage and reverse bias junction leakage. Subthreshold leakage is caused by current flowing from the drain to the source of a transistor operating in the subthreshold region. Gate leakage...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): H03K21/40
CPCH03K19/0008H03K3/012
Inventor 斯连列法斯·斯利亚迪巴托拉
Owner LSI CORPORATION