Four-bit reversible digital comparator

Abstract

The invention discloses a four-bit reversible digital comparator, which comprises: four 1-bit reversible digital comparator units, two New gates serving as 1-bit reversible AND gates, two 3-bit reversible AND gate circuit units, three four-bit reversible AND gate circuit units, two four-bit reversible OR gate circuit unit and a plurality of Feynman gates serving as duplicates. The bit expansion of a digital comparator and reversible digital comparators with more bits can be realized by using the four-bit reversible digital comparator and a parallel expansion mode.

Description

technical field [0001] The invention relates to the design of combinational logic circuits with low power consumption in the field of information technology, in particular to a four-bit reversible numerical comparator with low power consumption. Background technique [0002] In digital circuits, it is often necessary to compare two binary numbers with the same number of digits to determine their relative size or whether they are equal. The logic circuit used to realize this function is a numerical comparator. However, the traditional numerical comparator is irreversible, and there is a loss of information bits, which consumes a lot of energy. [0003] Landauer has confirmed that circuits constructed from traditional irreversible logic gates such as AND gates and XOR gates will inevitably generate energy loss during operation. Because in the calculation process, the loss of each bit of information consumes kT*ln2 joules of energy, where k is Boltzmann's constant and T is the...

AI Technical Summary

Problems solved by technology

[0003] Landauer has confirmed that the circuits constructed by irreversible traditional logic gates such as AND gates and XOR gates will inevitably produce energy loss during operation.

Images