Clock adjustment method and line card for synchronous digital hierarchy (SDH) system
A technology for synchronizing digital series and clocks, applied in time division multiplexing systems, multiplexing communications, electrical components, etc., can solve problems such as SDH system instability, and achieve the effect of switching clocks smoothly
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[0015] Hereinafter, the present invention will be described in detail with reference to the drawings and examples. It should be noted that, in the case of no conflict, the embodiments in the present application and the features in the embodiments can be combined with each other.
[0016] The SDH system uses multiple clock cards to provide clocks to all line cards that carry services, and both clock cards and line cards can use embedded systems (that is, single boards).
[0017] figure 2 A flowchart showing a clock adjustment method according to an embodiment of the present invention, including:
[0018] Step S10, the line card detects that the clock selection from the clock card has changed;
[0019] In step S20, the line card uses a low-priority task to process clock switching, so as to switch the SDH system to the changed clock.
[0020] This clock adjustment method sets the switching clock as a low priority, thereby ensuring the priority execution of other tasks in the ...
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