Data size-based shuffle switch matrix compression method

Abstract

The invention discloses a data size-based shuffle switch matrix compression method, which comprises the following steps of: step 1, when performing data size-based shuffle switch matrix compression according to a shuffle request, setting the data size of the current shuffle request to be the smallest data size first; step 2, judging whether the data size of the current shuffle request can be doubled, and if the data size of the current shuffle request cannot be doubled, skipping to the step 3, otherwise, skipping to the step 4; step 3, doubling the current data size, compressing the current shuffle switch matrix according to the doubled data size, and skipping to the step 2; step 4, further compressing the current switch matrix by using the current size indexing method; and step 5, judging whether the current shuffle request is the last shuffle request in the procedure, if the current shuffle request is not the last shuffle request, processing the next shuffle request, and skipping to the step 1, otherwise, ending the algorithm. The data size-based shuffle switch matrix compression method is simple in principle, is easy and convenient to operate, and can effectively improve the utilization ratio and the compression efficiency of a shuffle mode memory.

Description

technical field [0001] The present invention mainly relates to the field of general-purpose processors or digital signal processors (Digital Signal Processor, DSP) using Single Instruction Stream Multiple Datastreams (Single Instruction Stream Multiple Datastreams, SIMD) technology, and specifically refers to a kind of processor used in SIMD or DSP. Shuffle switch matrix compression method. Background technique [0002] SIMD technology, represented by subword parallel and vector technology, has great advantages in solving data-intensive applications such as media processing and wireless communication, so it has been widely used and developed, and is favored by processors, especially DSP. . The shuffling unit is mainly responsible for the data interaction between the registers of each processing unit of the SIMD component, and is a key component that restricts the performance of parallel processing units. [0003] The hardware main structure of the shuffling unit generally ...

AI Technical Summary

Problems solved by technology

[0008] Programs of different applications (or different program segments of the same application) often have different data widths. For example, in video algorithms, data widths are mostly bytes or halfwords. In wireless communication algorithms, complex operations (data widths of word or double word) accounted for a large proportion, the above phenomenon also leads to a large difference in the data granularity of the shuffling requests of different programs (or different program segments of the same application program), which seeks a more efficient The switch matrix compression method offers the possibility of

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