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Time synchronization method, device and system in transmission system

A technology of time synchronization and transmission system, applied in the field of communication, can solve problems such as inability to achieve synchronization

Inactive Publication Date: 2013-08-07
HUAWEI TECH CO LTD
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0007] Embodiments of the present invention provide a time synchronization method, device and system in a transmission system to solve the problem that existing solutions cannot achieve synchronization

Method used

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  • Time synchronization method, device and system in transmission system
  • Time synchronization method, device and system in transmission system
  • Time synchronization method, device and system in transmission system

Examples

Experimental program
Comparison scheme
Effect test

Embodiment 1

[0070] This embodiment implements time synchronization by looping back at the line interface side.

[0071] The scheme system block diagram is as follows Figure 4 Shown is the multi-pair transmission scenario.

[0072] ●CO and CPE each contain an equal number of DSL ports, and each port is bundled together through multi-pair technology to provide higher user access rates.

[0073] ●The multi-pair transmission technology can be bongding, vectoring, or MIMO.

[0074] ●△t1, △t2, △t3, △t4, △t5 are respectively in the downlink direction: CO sending digital delay, CO sending analog delay, twisted pair downlink line delay, CPE receiving analog delay, CPE receiving Digital delay.

[0075] ●△t1', △t2', △t3', △t4', △t5' are respectively in the upstream direction: CO receiving digital delay, CO receiving analog delay, twisted pair upstream line delay, CPE sending analog Delay, CPE sending digital delay.

[0076] ●The loopback unit is located at the line interface on the CPE side, a...

Embodiment 2

[0106] This embodiment implements time synchronization by looping back at the analog circuit side.

[0107] The scheme system block diagram is as follows Figure 5 Shown is the multi-pair transmission scenario.

[0108] ●CO and CPE each contain an equal number of DSL ports, and each port is bundled together through multi-pair technology to provide higher user access rates.

[0109] ●The multi-pair transmission technology can be bongding, vectoring, or MIMO.

[0110] ●△t1, △t2, △t3, △t4, △t5 are respectively in the downlink direction: CO sending digital delay, CO sending analog delay, twisted pair downlink line delay, CPE receiving analog delay, CPE receiving Digital delay.

[0111] ●△t1', △t2', △t3', △t4', △t5' are respectively in the upstream direction: CO receiving digital delay, CO receiving analog delay, twisted pair upstream line delay, CPE sending analog Delay, CPE sending digital delay.

[0112] ●The loopback unit is located on the analog circuit side of the CPE si...

Embodiment 3

[0139] This embodiment implements time synchronization by looping back at the digital circuit side.

[0140] The scheme system block diagram is as follows Figure 6 Shown is the multi-pair transmission scenario.

[0141] ●CO and CPE each contain an equal number of DSL ports, and each port is bundled together through multi-pair technology to provide higher user access rates.

[0142] ●The multi-pair transmission technology can be bongding, vectoring, or MIMO.

[0143] ●△t1, △t2, △t3, △t4, △t5 are respectively in the downlink direction: CO sending digital delay, CO sending analog delay, twisted pair downlink line delay, CPE receiving analog delay, CPE receiving Digital delay.

[0144] ●△t1', △t2', △t3', △t4', △t5' are respectively in the upstream direction: CO receiving digital delay, CO receiving analog delay, twisted pair upstream line delay, CPE sending analog Delay, CPE sending digital delay.

[0145] ●The loopback unit is located at the digital circuit side of the CPE ...

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Abstract

The embodiment of the invention discloses a time synchronization method and system in a multi-line pair transmission system and a communication device. Device time delays and line time delays among devices are determined by a loopback operation so as to calculate a time deviation, and time synchronization is carried out by adopting the time deviation. The line time delays on twisted-pair cables of an uplink and a downlink are identical because an identical frequency-range signal is adopted in the uplink and the downlink during a loopback stage, thus the time deviation can be obtained and the time synchronization on the multi-line pair transmission system is finally realized.

Description

technical field [0001] The present invention relates to the field of communication technology, in particular to a time synchronization method, device and system in a transmission system. Background technique [0002] Digital Subscriber Line (Digital Subscriber Line, DSL) technology is a high-speed transmission technology for data transmission through telephone twisted pair, that is, Unshielded Twist Pair (Unshielded Twist Pair, UTP), including Asymmetrical Digital Subscriber Line (Asymmetrical Digital Subscriber Line) Subscriber Line, ADSL), Very-high-bit-rate Digital Subscriber Line (VDSL), ISDN Digital Subscriber Line (IDSL) based on Integrated Services Digital Network (ISDN) ), Single-pair High-bit-rate Digital Subscriber Line (Single-pair High-bit-rate Digital Subscriber Line, SHDSL), second-generation asymmetrical digital subscriber line (Asymmetrical Digital Subscriber Line 2, ADSL2), second-generation asymmetrical digital subscriber line plus (Asymmetrical Digital Su...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): H04L27/26H04L7/00
Inventor 冯儒洲徐贵今
Owner HUAWEI TECH CO LTD