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Compilation optimization method for loongson-based 3A vector memory access

A vector and memory access technology, applied in the field of compilation optimization and back-end code generation based on Loongson 3A vector memory access, can solve problems such as inability to compile and optimize, and achieve the effect of saving workload

Inactive Publication Date: 2011-11-02
UNIV OF SCI & TECH OF CHINA
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

Since the existing Loongson 3A processor does not design vector registers, it is not possible to directly use the automatic vectorization method for compilation optimization

Method used

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  • Compilation optimization method for loongson-based 3A vector memory access
  • Compilation optimization method for loongson-based 3A vector memory access
  • Compilation optimization method for loongson-based 3A vector memory access

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Experimental program
Comparison scheme
Effect test

Embodiment 1

[0013] This embodiment is based on the compilation optimization method of Loongson 3A vector memory access. The preliminary compilation optimization scheme is: first use the open source compiler package (GCC) to automatically vectorize the front end to generate a tree structure in vector form, and then use the tree structure in vector form Expand to the intermediate representation in the form of vectors; then perform diversity processing on the intermediate representations in the form of vectors; finally convert the intermediate representations in the form of vectors into vector memory access instructions.

[0014] The specific operation steps are as follows:

[0015] The first step, vector expansion

[0016] The instruction format of Loongson vector 128-bit memory access is: gsLQC1 fq, ft, offset(base); gsSDC1 fq, ft, offset(base). Automatic vectorization generates a tree structure in vector form, but at this time, memory access and calculation in the tree structure have 128...

example 1

[0029] Example 1 for(i=0; i

[0030] {

[0031] A[i]=B[i]+C[i];

[0032] E[i]=D[i]+C[i];

[0033]}

example 2

[0034] Example 2 for(i=0; i

[0035] {

[0036] A[i]=B[i]+C[i];

[0037] E[i]=D[i]+C[i];

[0038]}

[0039] (3) The lvalue of a statement with public operation variables may be the rvalue of another statement, forming an assignment chain. Such as A[i] in the for loop structure of Example 2.

[0040] In specific procedures, diversity is mainly reflected in the following three types of cyclical procedures:

[0041] Diversity 1:

[0042]

[0043] Diversity 2:

[0044]

[0045] Diversity 3:

[0046]

[0047]

[0048] The characteristics represented by these three types of programs are:

[0049] (1) The public operation variable is the rvalue of the assignment statement, such as the x variable in diversity 1.

[0050] (2) The public operation variable is the rvalue of the multiplication statement, such as b[i] or x in diversity 2.

[0051] (3) The public operation variable is the rvalue of the addition statement, such as c[i] in diversity 3.

[0052] A...

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PUM

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Abstract

The invention discloses a compilation optimization method for loongson-based 3A vector memory access. The method provided by the invention is characterized by comprising the following steps: adding an expansion path from a vector tree structure to intermediate representation, and transforming the vector tree structure into corresponding intermediate representation; in the process of expansion, carrying out expansion along an original path when a normal mode is adopted; carrying out expansion is carried out along a new path when a vectorization mode is adopted; for loop containing public operation variables, creating an assignment chain by utilizing the generated intermediate representation, and updating the operand of the assignment chain; after expansion from the tree to register transmission language (RTL) representation, adding an optimization pass for a pass_replace_reg; and in a rear-end instruction description file of a compiler, adding rear-end instruction description of a vector instruction, and automatically translating the generated intermediate representation into an assembler instruction by the compiler. By using the method provided by the invention, the compiler can automatically generate a high-performance vector memory access instruction, thereby saving manual compilation of programmers and greatly improving the operation efficiency of application programs.

Description

technical field [0001] The invention belongs to the technical field of computer compilation, and in particular relates to a method for compiling optimization and back-end code generation based on Loongson 3A vector memory access. Background technique [0002] According to the user manual of the Loongson 3A processor, the existing Loongson 3A processor has designed a vector memory access instruction, which can read 128-bit data from the memory at a time and store it in two different registers. In the optimization of vector memory access in the compiler, the traditional method is to adopt the method of automatic vectorization, but this requires the support of vector registers in the hardware. Since there is no vector register designed in the existing Loongson 3A processor, automatic vectorization cannot be directly used for compilation optimization. [0003] The officially designated compiler for Loongson processors is the Open Source Compiler Suite (GCC), which can use the e...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): G06F9/45
Inventor 顾乃杰彭飞林传文郭利财
Owner UNIV OF SCI & TECH OF CHINA